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loongson: drivers: spi: fix spi bus freq error bug

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Changelog: 修复loongson spi的总线频率错误的问题
Signed-off-by: maoxiaochuan <maoxiaochuan@loongson.cn>
This commit is contained in:
tao89959
2026-08-24 14:17:13 +08:00
committed by maoxiaochuan
parent 0276e0d4ee
commit c08629e3b1
1 changed files with 8 additions and 4 deletions
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drivers/spi/spi-loongson-core.c
+8 -4
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@@ -42,12 +42,16 @@ static void loongson_spi_set_clk(struct loongson_spi *loongson_spi, unsigned int
{
unsigned char val;
unsigned int div, div_tmp;
static const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11};
// 第一个元素是无效的，肯定不会进来的
static const char spre[13] = {0, 0, 0, 1, 0, 0, 1, 1, 1, 2, 2, 2, 2};
static const char spr[13] = {0, 0, 1, 0, 2, 3, 1, 2, 3, 0, 1, 2, 3};
div = clamp_val(DIV_ROUND_UP_ULL(loongson_spi->clk_rate, hz), 2, 4096);
div_tmp = rdiv[fls(div - 1)];
loongson_spi->spcr = (div_tmp & GENMASK(1, 0)) >> 0;
loongson_spi->sper = (div_tmp & GENMASK(3, 2)) >> 2;
div_tmp = fls(div - 1);
loongson_spi->spcr = spr[div_tmp];
loongson_spi->sper = spre[div_tmp];
val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
val &= ~GENMASK(1, 0);
loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val |