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net: phy: yt8531h: fix pll enable setup bug

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Changelog: 修复yt8531h的pll设置失败问题
Signed-off-by: maoxiaochuan <maoxiaochuan@loongson.cn>
This commit is contained in:
tao89959
2026-08-24 14:17:16 +08:00
committed by maoxiaochuan
parent 42fcf753ac
commit 7d6aacdf8d
1 changed files with 5 additions and 2 deletions
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drivers/net/phy/motorcomm.c
+5 -2
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@@ -1731,9 +1731,12 @@ static int yt8531_config_init(struct phy_device *phydev)
if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) {
/* enable RXC clock when no wire plug */ /* enable RXC clock when no wire plug */
ret = ytphy_write_ext(phydev, 0xa000, 0);
ret = ytphy_modify_ext_with_lock(phydev, ret = ytphy_modify_ext_with_lock(phydev,
YT8521_CLOCK_GATING_REG, YT8521_CLOCK_GATING_REG,
YT8521_CGR_RX_CLK_EN, 0); (1 << 12 | 0x1 << 1 | 0x1 << 2 | 0xf << 4),
(0x1 << 1 | 0x1 << 2 | 0x8 << 4));
if (ret < 0) if (ret < 0)
return ret; return ret;
} }