up to 833f4f6ce9

This commit is contained in:
loongson
2024-07-25 14:54:28 +08:00
parent e08a4045bd
commit 8df076d8dd
23 changed files with 691 additions and 154 deletions
+3 -7
View File
@@ -1,12 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_LOONGSON64_GENERIC) += loongson3_ls7a.dtb
dtb-$(CONFIG_LOONGSON_2K500) += ls2k500_hl_mb.dtb ls2k500_mini_dp.dtb ls2k500_dayu400_mb.dtb ls2k500_modi_hct.dtb ls2k500_zhengtai_pcs1800_v10.dtb \
ls2k500_jiaoqian_v10.dtb ls2k500_zjjz.dtb
dtb-$(CONFIG_LOONGSON_2K1000) += ls2k1000_jl_mb.dtb ls2k1000_jl_mb_mu.dtb ls2k1000_jl_mb_nodvo.dtb \
ls2k1000_dp.dtb ls2k1000_dp_i2s.dtb ksec_hac_mb.dtb gbkpdm0_v10.dtb gbkpdm0_litong.dtb \
ls2k1000_cl_mb.dtb ls2k1000_dp_test.dtb ls2k1000_dp_factory.dtb
dtb-$(CONFIG_LOONGSON_2P500) += ls2p500_evb.dtb ls2p500_rsj_mb_v10.dtb
dtb-$(CONFIG_LOONGSON_2K500) += ls2k500_mini_dp.dtb
dtb-$(CONFIG_LOONGSON_2K1000) += ls2k1000_dp.dtb
dtb-$(CONFIG_LOONGSON_2P500) += ls2p500_gbkpjm0_v10.dtb
dtb-$(CONFIG_LOONGSON_2K300) += ls2k300_mini_dp.dtb ls2k300_pai.dtb
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
@@ -874,7 +874,7 @@
};
cpu_crit: cpu-crit {
temperature = <125000>;
temperature = <160000>;
hysteresis = <5000>;
type = "critical";
};
@@ -11,6 +11,12 @@
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
serial6 = &uart6;
serial7 = &uart7;
serial8 = &uart8;
serial9 = &uart9;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -93,6 +99,30 @@
pinctrl-single,bits = <0x8 0xf0000000 0xf0000000>;
};
uart4_pins: pinmux_G62_G63_as_uart4 {
pinctrl-single,bits = <0xc 0xa0000000 0xf0000000>;
};
uart5_pins: pinmux_G64_G65_as_uart5 {
pinctrl-single,bits = <0x10 0x000000a 0x0000000f>;
};
uart6_pins: pinmux_G60_G61_as_uart6 {
pinctrl-single,bits = <0xc 0x0a000000 0x0f000000>;
};
uart7_pins: pinmux_G68_G69_as_uart7 {
pinctrl-single,bits = <0x10 0xf0000a00 0x00000f00>;
};
uart8_pins: pinmux_G70_G71_as_uart8 {
pinctrl-single,bits = <0x8 0x0f00a000 0x0f00f000>;
};
uart9_pins: pinmux_G66_G67_as_uart9 {
pinctrl-single,bits = <0x10 0x000000a0 0xf00000f0>;
};
i2c0_pins: pinmux_G48_G49_as_i2c0 {
pinctrl-single,bits = <0xc 0x0000000f 0x0000000f>;
};
@@ -158,6 +188,30 @@
pinctrl-single,bits = <0x14 0x00080000 0x000c0000>;
};
tim1_ch1:pinmux_G81_as_tim1_ch1 {
pinctrl-single,bits = <0x14 0x0000000c 0x0000000c>;
};
tim1_ch1n:pinmux_G84_as_tim1_ch1n {
pinctrl-single,bits = <0x14 0x00000300 0x000000300>;
};
tim1_ch2n:pinmux_G85_as_tim1_ch2n {
pinctrl-single,bits = <0x14 0x00000c00 0x000000c00>;
};
tim1_ch3n:pinmux_G86_as_tim1_ch3n {
pinctrl-single,bits = <0x14 0x00003000 0x000003000>;
};
tim2_ch1:pinmux_G87_as_tim2_ch1 {
pinctrl-single,bits = <0x14 0x0000c000 0x00000c000>;
};
tim2_ch2:pinmux_G88_as_tim2_ch2 {
pinctrl-single,bits = <0x14 0x00030000 0x00030000>;
};
sdio0_pins: pinmux_G90_G99_as_sdio {
pinctrl-single,bits = <0x14 0xfff00000 0xfff00000
0x18 0x000000ff 0x000000ff>;
@@ -244,6 +298,78 @@
status = "disabled";
};
uart4: serial@0x16101000 {
compatible = "ns16550a";
reg = <0 0x16101000 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <2>;
pinctrl-0 = <&uart4_pins>;
pinctrl-names = "default";
no-loopback-test;
};
uart5: serial@0x16101400 {
compatible = "ns16550a";
reg = <0 0x16101400 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <2>;
no-loopback-test;
pinctrl-0 = <&uart5_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart6: serial@0x16101800 {
compatible = "ns16550a";
reg = <0 0x16101800 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <3>;
no-loopback-test;
pinctrl-0 = <&uart6_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart7: serial@0x16101c00 {
compatible = "ns16550a";
reg = <0 0x16101c00 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <3>;
no-loopback-test;
pinctrl-0 = <&uart7_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart8: serial@0x16102000 {
compatible = "ns16550a";
reg = <0 0x16102000 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <3>;
no-loopback-test;
pinctrl-0 = <&uart8_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart9: serial@0x16102400 {
compatible = "ns16550a";
reg = <0 0x16102400 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&icu>;
interrupts = <3>;
no-loopback-test;
pinctrl-0 = <&uart9_pins>;
pinctrl-names = "default";
status = "disabled";
};
dc: dc@0x16090000 {
compatible = "loongson,ls2k0300-dc";
reg = <0 0x16090000 0 0x00010000>;
@@ -267,8 +393,11 @@
};
wdt: syscon@0x16124000 {
compatible = "syscon";
reg = <0x0 0x16124000 0x0 0xc>;
compatible = "loongson,ls2x-wdt", "syscon";
reg = <0 0x16124000 0 0xC>;
clocks = <&clocks CLK_APB>;
clock-names = "wdt-clk";
status = "okay";
};
reboot {
@@ -22,6 +22,8 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
mmc0 = &emmc0;
mmc1 = &sdio1;
};
// memory {
@@ -82,7 +84,6 @@
interrupts = <4>;
};
#if 1
extioiic: interrupt-controller@0x14001600 {
compatible = "loongson,extioi-interrupt-controller";
interrupt-controller;
@@ -94,7 +95,6 @@
misc_func=<0x100>;
eio_en_off=<15>;
};
#endif
// uart0 uart1 分线复用
pinmux_uart: pinmux@14000100 {
@@ -156,6 +156,10 @@
pinctrl-single,bits = <0x0 0xff000000 0xff000000>;
};
g12_15_as_gpio: pinmux_g12_15_as_gpio {
pinctrl-single,bits = <0x0 0x00000000 0xff000000>;
};
//sdio0 gpio4~7 2
// gpio16~21 3
sdio0_pins: pinmux_i2c0_pins {
@@ -457,13 +461,18 @@
status = "disabled";
};
// EMMC 与 SDIO 必须同时使用扩展中断,
// 如果只有SDIO使用扩展中断,则中断不会响应
// 表现为系统卡死
/*emmc*/
emmc0@0x14210000 {
emmc0: mmc0@0x14210000 {
#address-cells = <2>;
compatible = "loongson,ls2k_sdio_1.1";
reg = <0 0x14210000 0 0x1000>;
interrupt-parent = <&icu>;
interrupts = <13>;
//interrupt-parent = <&icu>;
//interrupts = <13>;
interrupt-parent = <&extioiic>;
interrupts = <8>;
interrupt-names = "ls2k_mci_irq";
dma-mask = <0xffffffff 0xffffffff>;
clock-frequency = <0 200000000>;
@@ -473,25 +482,27 @@
no-sdio;
pinctrl-0 = <&sdio0_pins>;
pinctrl-names = "default";
status = "disabled";
};
#if 0
sdio:sdio0@0x14218000 {
sdio1: mmc1@0x14218000 {
#address-cells = <2>;
compatible = "loongson,ls2k_sdio_1.1";
compatible = "loongson,ls2k_sdio_1.2";
reg = <0 0x14218000 0 0x1000>;
interrupt-parent = <&extioiic>;
interrupts = <10>;
interrupt-names = "ls2k_mci_irq";
interrupt-parent = <&icu>;
interrupts = <13>;
//interrupt-parent = <&extioiic>;
//interrupts = <10>;
interrupt-names = "ls2k_sdio_irq";
clock-frequency = <0 200000000>;
dma-mask = <0xffffffff 0xffffffff>;
bus-width = <4>;
cap-sd-highspeed;
no-mmc;
pinctrl-0 = <&sdio1_pins>;
pinctrl-names = "default";
cap-mmc-highspeed;
//no-mmc;
status = "disabled";
};
#endif
gmac0: ethernet@0x14140000 {
compatible = "snps,dwmac-3.70a";
reg = <0 0x14140000 0 0x10000>;
@@ -526,7 +537,7 @@
status = "disabled";
};
otg@0x14100000 {
otg: otg@0x14100000 {
//compatible = "loongson,dwc-otg","dwc-otg","loongson,dwc2";
compatible = "loongson,loongson2-dwc2";
reg = <0 0x14100000 0 0x40000>;
@@ -11,12 +11,13 @@
bootargs = "earlycon";
};
memory {
name = "memory";
device_type = "memory";
reg = <0 0x00200000 0 0x0ee00000
0 0x90000000 0 0x10000000>;
};
/* not need memory node, we get memory info from boot params. */
//memory {
// name = "memory";
// device_type = "memory";
// reg = <0 0x00200000 0 0x0ee00000
// 0 0x90000000 0 0x10000000>;
//};
reserved-memory {
#address-cells = <2>;
@@ -27,7 +27,7 @@
/* lcd power on control gpio */
// enable-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
// power-supply = <&vdd_lcd>;
#if 1 // 4.3' LCD
#if 0 // 4.3' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
@@ -107,6 +107,10 @@
&i2c1 {
status = "ok"
// 两款芯片不能同时支持,因为用同一个GPIO
// 但可以在两个屏幕间切换
// 4.3寸触屏芯片
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
@@ -116,6 +120,15 @@
interrupts = <210 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
};
// 7寸触屏芯片
touchpad_1: gt911@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio>;
interrupts = <210 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
};
};
&i2c2 {
@@ -14,12 +14,13 @@
bootargs = "earlycon";
};
memory {
name = "memory";
device_type = "memory";
reg = <0 0x00200000 0 0x0ee00000
0 0x90000000 0 0x10000000>;
};
/* not need memory node, we get memory info from boot params. */
//memory {
// name = "memory";
// device_type = "memory";
// reg = <0 0x00200000 0 0x0ee00000
// 0 0x90000000 0 0x10000000>;
//};
reserved-memory {
#address-cells = <2>;
@@ -45,16 +46,22 @@
};
};
lcd_backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
status = "okay";
};
panel: dvo-connector@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "panel-lvds", "auo,b101ean01";
//backlight = <&lcd_backlight>;
backlight = <&lcd_backlight>;
/* lcd power on control gpio */
// enable-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
// power-supply = <&vdd_lcd>;
#if 1 // 4.3' LCD
#if 0 // 4.3' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
@@ -141,6 +148,26 @@
status = "okay";
};
&uart2 {
status = "ok"
};
&uart5 {
status = "disabled";
};
&uart6 {
status = "disabled";
};
&uart7 {
status = "disabled";
};
&uart8 {
status = "disabled";
};
&spi0 {
status = "okay";
@@ -151,6 +178,20 @@
};
};
&spi1 {
status = "okay";
};
&spi2 {
status = "ok"
mcp3004@0 {
compatible = "mcp3004";
reg = <0>;
spi-max-frequency = <1500000>;
};
};
&gmac0 {
status = "okay";
phy-handle = <&yt8511h0>;
@@ -188,6 +229,25 @@
&i2c0 {
status = "ok"
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
// 2K300 GPIO 支持中断控制
// GPIO 中断号为 vhwirq-base + pinnum (170 = 128 + 42)
interrupt-parent = <&gpio>;
interrupts = <170 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio 55 GPIO_ACTIVE_LOW>;
};
};
&i2c1 {
status = "ok"
};
&i2c2 {
status = "okay";
codec: es8388@11{
compatible = "everest,es8388";
reg = <0x11>;
@@ -197,65 +257,23 @@
PVDD-supply = <&vccio_codec>;
clocks = <&es8388_clk 0>;
};
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
// 2K300 GPIO 支持中断控制
// 暂时PCB布局有问题,所以随便写个引脚
// GPIO 中断号为 vhwirq-base + pinnum (181 = 128 + 53)
interrupt-parent = <&gpio>;
interrupts = <181 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
};
};
&i2c1 {
status = "ok"
&can0 {
status = "disabled";
};
// &i2c2 {
// status = "okay";
// };
&uart2 {
status = "ok"
&can1 {
status = "disabled";
};
// &can0 {
// status = "okay";
// };
&can2 {
status = "disabled";
};
// &can1 {
// status = "okay";
// };
// &can2 {
// status = "okay";
// };
// &can3 {
// status = "okay";
// };
// &spi1 {
// status = "okay";
// spidev0@0 {
// compatible = "rohm,dh2228fv";
// reg = <0>;
// spi-max-frequency = <50000000>;
// };
// };
&spi2 {
status = "ok"
mcp3004@0 {
compatible = "mcp3004";
reg = <0>;
spi-max-frequency = <1500000>;
};
&can3 {
status = "disabled";
};
&adc {
@@ -287,3 +305,7 @@
&sound {
status = "okay";
};
&pwm0 {
status = "okay";
};
@@ -45,3 +45,7 @@
};
};
&emmc0 {
status = "okay";
};
@@ -0,0 +1,61 @@
#include "ls2p500_g2p05z0_v10.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "LS2P500-GBKPJM0";
};
// UART LCD
&uart1 {
status = "okay";
};
// PRT-UART0
&uart4 {
status = "okay";
};
// SCA-UART0
&uart6 {
status = "okay";
};
// PRT-I2C0
&i2c2 {
status = "okay";
};
// PRT-I2C1
&i2c3 {
status = "okay";
};
&spi2 {
status = "okay";
};
&spi3 {
status = "okay";
};
&gmac0 {
status = "okay";
};
&gmac1 {
status = "okay";
};
&otg {
status = "okay";
dr_mode = "host";
};
&sdio1 {
status = "okay";
pinctrl-0 = <&sdio1_pins>, <&g12_15_as_gpio>;
pinctrl-names = "default";
cd-gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
};
@@ -202,8 +202,6 @@ CONFIG_NETLINK_DIAG=y
CONFIG_CGROUP_NET_PRIO=y
CONFIG_BPF_JIT=y
CONFIG_CAN=y
#CONFIG_CAN_LSCAN=y
#CONFIG_CAN_LSCAN_PLATFORM=y
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_RFKILL=y
@@ -321,17 +319,42 @@ CONFIG_PPP_SYNC_TTY=y
# CONFIG_WLAN_VENDOR_MARVELL is not set
# CONFIG_WLAN_VENDOR_MEDIATEK is not set
# CONFIG_WLAN_VENDOR_MICROCHIP is not set
# CONFIG_WLAN_VENDOR_RALINK is not set
CONFIG_RT2X00=m
CONFIG_RT2400PCI=m
CONFIG_RT2500PCI=m
CONFIG_RT61PCI=m
CONFIG_RT2800PCI=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RT2800USB_RT3573=y
CONFIG_RT2800USB_RT53XX=y
CONFIG_RT2800USB_RT55XX=y
CONFIG_RT2800USB_UNKNOWN=y
CONFIG_RT2X00_DEBUG=y
CONFIG_RTL8180=m
CONFIG_RTL8187=m
CONFIG_RTL_CARDS=m
CONFIG_RTL8192CE=m
CONFIG_RTL8192SE=m
CONFIG_RTL8192DE=m
CONFIG_RTL8723AE=m
CONFIG_RTL8723BE=m
CONFIG_RTL8188EE=m
CONFIG_RTL8192EE=m
CONFIG_RTL8821AE=m
CONFIG_RTL8192CU=m
CONFIG_RTL8XXXU=m
CONFIG_RTL8XXXU_UNTESTED=y
CONFIG_RTW88=m
CONFIG_RTW88_8822BE=m
CONFIG_RTW88_8822BU=m
CONFIG_RTW88_8822CE=m
CONFIG_RTW88_8822CU=m
CONFIG_RTW88_8723DE=m
CONFIG_RTW88_8723DU=m
CONFIG_RTW88_8821CE=m
CONFIG_RTW88_8821CU=m
# CONFIG_WLAN_VENDOR_RSI is not set
# CONFIG_WLAN_VENDOR_ST is not set
# CONFIG_WLAN_VENDOR_TI is not set
@@ -82,6 +82,169 @@ CONFIG_INET_DIAG=m
CONFIG_INET_UDP_DIAG=m
# CONFIG_IPV6 is not set
CONFIG_NETWORK_PHY_TIMESTAMPING=y
CONFIG_NETFILTER=y
CONFIG_NF_CONNTRACK=y
CONFIG_NF_LOG_NETDEV=y
CONFIG_NF_CONNTRACK_ZONES=y
CONFIG_NF_CONNTRACK_EVENTS=y
CONFIG_NF_CONNTRACK_TIMEOUT=y
CONFIG_NF_CONNTRACK_TIMESTAMP=y
CONFIG_NF_CONNTRACK_AMANDA=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_H323=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_NETBIOS_NS=y
CONFIG_NF_CONNTRACK_SNMP=y
CONFIG_NF_CONNTRACK_PPTP=y
CONFIG_NF_CONNTRACK_SANE=y
CONFIG_NF_CONNTRACK_SIP=y
CONFIG_NF_CONNTRACK_TFTP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NF_CT_NETLINK_TIMEOUT=y
CONFIG_NF_CT_NETLINK_HELPER=y
CONFIG_NETFILTER_NETLINK_GLUE_CT=y
CONFIG_NF_TABLES=y
CONFIG_NF_TABLES_NETDEV=y
CONFIG_NFT_NUMGEN=y
CONFIG_NFT_CT=y
CONFIG_NFT_COUNTER=y
CONFIG_NFT_CONNLIMIT=y
CONFIG_NFT_LOG=y
CONFIG_NFT_LIMIT=y
CONFIG_NFT_MASQ=y
CONFIG_NFT_REDIR=y
CONFIG_NFT_TUNNEL=y
CONFIG_NFT_OBJREF=y
CONFIG_NFT_QUEUE=y
CONFIG_NFT_QUOTA=y
CONFIG_NFT_REJECT=y
CONFIG_NFT_HASH=y
CONFIG_NFT_XFRM=y
CONFIG_NFT_SOCKET=y
CONFIG_NFT_OSF=y
CONFIG_NFT_TPROXY=y
CONFIG_NFT_SYNPROXY=y
CONFIG_NFT_DUP_NETDEV=y
CONFIG_NFT_FWD_NETDEV=y
CONFIG_NF_FLOW_TABLE=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
CONFIG_NETFILTER_XT_TARGET_HMARK=y
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
CONFIG_NETFILTER_XT_TARGET_LED=y
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_MARK=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
CONFIG_NETFILTER_XT_TARGET_TEE=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
CONFIG_NETFILTER_XT_MATCH_BPF=y
CONFIG_NETFILTER_XT_MATCH_CGROUP=y
CONFIG_NETFILTER_XT_MATCH_CLUSTER=y
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_CPU=y
CONFIG_NETFILTER_XT_MATCH_DCCP=y
CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y
CONFIG_NETFILTER_XT_MATCH_DSCP=y
CONFIG_NETFILTER_XT_MATCH_ESP=y
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
CONFIG_NETFILTER_XT_MATCH_HELPER=y
CONFIG_NETFILTER_XT_MATCH_IPCOMP=y
CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
CONFIG_NETFILTER_XT_MATCH_L2TP=y
CONFIG_NETFILTER_XT_MATCH_LENGTH=y
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
CONFIG_NETFILTER_XT_MATCH_NFACCT=y
CONFIG_NETFILTER_XT_MATCH_OSF=y
CONFIG_NETFILTER_XT_MATCH_OWNER=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
CONFIG_NETFILTER_XT_MATCH_RATEEST=y
CONFIG_NETFILTER_XT_MATCH_REALM=y
CONFIG_NETFILTER_XT_MATCH_RECENT=y
CONFIG_NETFILTER_XT_MATCH_SCTP=y
CONFIG_NETFILTER_XT_MATCH_SOCKET=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=y
CONFIG_NETFILTER_XT_MATCH_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_TIME=y
CONFIG_NETFILTER_XT_MATCH_U32=y
CONFIG_IP_SET=y
CONFIG_IP_SET_BITMAP_IP=y
CONFIG_IP_SET_BITMAP_IPMAC=y
CONFIG_IP_SET_BITMAP_PORT=y
CONFIG_IP_SET_HASH_IP=y
CONFIG_IP_SET_HASH_IPMARK=y
CONFIG_IP_SET_HASH_IPPORT=y
CONFIG_IP_SET_HASH_IPPORTIP=y
CONFIG_IP_SET_HASH_IPPORTNET=y
CONFIG_IP_SET_HASH_IPMAC=y
CONFIG_IP_SET_HASH_MAC=y
CONFIG_IP_SET_HASH_NETPORTNET=y
CONFIG_IP_SET_HASH_NET=y
CONFIG_IP_SET_HASH_NETNET=y
CONFIG_IP_SET_HASH_NETPORT=y
CONFIG_IP_SET_HASH_NETIFACE=y
CONFIG_IP_SET_LIST_SET=y
CONFIG_IP_VS=y
CONFIG_IP_VS_DEBUG=y
CONFIG_IP_VS_PROTO_TCP=y
CONFIG_IP_VS_PROTO_UDP=y
CONFIG_IP_VS_PROTO_ESP=y
CONFIG_IP_VS_PROTO_AH=y
CONFIG_IP_VS_PROTO_SCTP=y
CONFIG_IP_VS_RR=y
CONFIG_IP_VS_WRR=y
CONFIG_IP_VS_LC=y
CONFIG_IP_VS_WLC=y
CONFIG_IP_VS_FO=y
CONFIG_IP_VS_OVF=y
CONFIG_IP_VS_LBLC=y
CONFIG_IP_VS_LBLCR=y
CONFIG_IP_VS_DH=y
CONFIG_IP_VS_SH=y
CONFIG_IP_VS_MH=y
CONFIG_IP_VS_SED=y
CONFIG_IP_VS_NQ=y
CONFIG_IP_VS_FTP=y
CONFIG_IP_VS_PE_SIP=y
CONFIG_NF_TABLES_IPV4=y
CONFIG_NFT_DUP_IPV4=y
CONFIG_NFT_FIB_IPV4=y
CONFIG_NF_TABLES_ARP=y
CONFIG_NF_FLOW_TABLE_IPV4=y
CONFIG_NF_LOG_ARP=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_MATCH_AH=y
CONFIG_IP_NF_MATCH_ECN=y
CONFIG_IP_NF_MATCH_TTL=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_TARGET_SYNPROXY=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_TARGET_NETMAP=y
CONFIG_IP_NF_TARGET_REDIRECT=y
CONFIG_IP_NF_MANGLE=y
CONFIG_IP_NF_TARGET_CLUSTERIP=y
CONFIG_IP_NF_TARGET_ECN=y
CONFIG_IP_NF_TARGET_TTL=y
CONFIG_IP_NF_RAW=y
CONFIG_IP_NF_ARPTABLES=y
CONFIG_IP_NF_ARPFILTER=y
CONFIG_IP_NF_ARP_MANGLE=y
CONFIG_NF_CONNTRACK_BRIDGE=y
CONFIG_NETLINK_DIAG=m
CONFIG_CGROUP_NET_PRIO=y
CONFIG_CAN=m
@@ -261,6 +424,9 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC2=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_XR21V141X=y
CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_LS2K=y
@@ -106,11 +106,8 @@ struct loongson_system_configuration {
extern void *loongson_fdt_blob;
extern u32 __dtb_loongson3_ls7a_begin[];
extern u32 __dtb_ls2k500_mini_dp_begin[];
extern u32 __dtb_ls2k500_dayu400_mb_begin[];
extern u32 __dtb_ls2k1000_jl_mb_begin[];
extern u32 __dtb_ls2k1000_dp_begin[];
extern u32 __dtb_ls2p500_evb_begin[];
extern u32 __dtb_ls2p500_rsj_mb_v10_begin[];
extern u32 __dtb_ls2p500_gbkpjm0_v10_begin[];
extern u32 __dtb_ls2k300_mini_dp_begin[];
extern u32 __dtb_ls2k300_pai_begin[];
extern char __dtb_start[];
-1
View File
@@ -74,7 +74,6 @@ config LOONGSON_2K300
select SYS_SUPPORTS_LITTLE_ENDIAN
select ZONE_DMA32
select USE_OF
select LOONGSON_MEM_MAP_NEED_FIX
select COMMON_CLK
help
Loongson 2K300 family SoC.
+21 -9
View File
@@ -228,17 +228,14 @@ static inline int check_cpu_full_name_invaild(int cpu)
return 0;
}
static void *get_fdt(void)
static void *get_fdt_by_board_name(void)
{
void *fdt = NULL;
if (b_info.board_name) {
#ifdef CONFIG_LOONGSON_2K500
int i;
if (!strncmp(b_info.board_name, "LS2K500-MINI-DP", 15))
fdt = &__dtb_ls2k500_mini_dp_begin;
else if (!strncmp(b_info.board_name, "LS2K500-DAYU400-MB", 17))
fdt = &__dtb_ls2k500_dayu400_mb_begin;
else
fdt = &__dtb_ls2k500_mini_dp_begin;
@@ -254,12 +251,10 @@ static void *get_fdt(void)
fdt = &__dtb_ls2k1000_dp_begin;
}
#elif defined(CONFIG_LOONGSON_2P500)
if (!strncmp(b_info.board_name, "LS2P500-EVB", 11))
fdt = &__dtb_ls2p500_evb_begin;
else if (!strncmp(b_info.board_name, "LS2P500-RSJ", 11))
fdt = &__dtb_ls2p500_rsj_mb_v10_begin;
if (!strncmp(b_info.board_name, "LS2P500-GBKPJM0", 15))
fdt = &__dtb_ls2p500_gbkpjm0_v10_begin;
else
fdt = &__dtb_ls2p500_evb_begin;
fdt = &__dtb_ls2p500_gbkpjm0_v10_begin;
#elif defined(CONFIG_LOONGSON_2K300)
if (!strncmp(b_info.board_name, "LS2K300-MINI-DP", 15))
fdt = &__dtb_ls2k300_mini_dp_begin;
@@ -269,6 +264,23 @@ static void *get_fdt(void)
fdt = &__dtb_ls2k300_mini_dp_begin;
#endif
}
return fdt;
}
static void *get_fdt(void)
{
void *fdt = NULL;
if (fw_passed_dtb)
fdt = (void *)fw_passed_dtb;
else if (fw_arg3) {
// uboot的传参基本在这个判断
if (!fdt_check_header((void *)fw_arg3))
fdt = (void *)fw_arg3;
}
if (!fdt)
fdt = get_fdt_by_board_name();
if (!fdt && IS_ENABLED(CONFIG_BUILTIN_DTB)
&& (&__dtb_start != &__dtb_end))