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Huacai Chen afe0d84385 LoongArch: Don't panic if no valid cache info for PCI 
If there is no valid cache info detected (may happen in virtual machine)
for pci_dfl_cache_line_size, kernel shouldn't panic. Because in the PCI
core it will be evaluated to (L1_CACHE_BYTES >> 2).

Cc: <stable@vger.kernel.org>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: maoxiaochuan <maoxiaochuan@loongson.cn>
2025-11-24 15:14:38 +08:00
..
alpha
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
arc
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
arm
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
arm64
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
csky
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
hexagon
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
loongarch
LoongArch: Don't panic if no valid cache info for PCI
2025-11-24 15:14:38 +08:00
m68k
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
microblaze
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
mips
MIPS: Loongson64: DTS: Really fix PCIe port nodes for ls7a
2025-02-13 14:26:47 +08:00
nios2
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
openrisc
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
parisc
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
powerpc
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
riscv
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
s390
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
sh
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
sparc
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
um
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
x86
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
xtensa
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
.gitignore
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00
Kconfig
init src (linux-6.12.0)
2025-02-13 14:11:16 +08:00