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Update to 14fc3074cfe039

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1. 添加带irq处理的gpio驱动
2. 龙芯2k系列添加mmc驱动支持
3. 添加看门狗驱动
4. dtb支持从command line中的board_name字段判断
5. 支持内存分布描述数据从固件传入的数据获取
6. 支持从bootcmdline获取ramdisk启动的地址和所用大小
7. 添加2k300的i2c总线驱动
8. 2k300使用新的spi 和 spi-io 驱动
9. CPU芯片温度传感器支持2k300的计算方式
10. 添加2k300的adc驱动
11. pwm: update default pwm freq to 50Mhz
12. loongson pwm 驱动支持dts使用clock-frequency形式声明频率
13. loongson pwm 确保disable时输出的电平为空闲电平
14. 2k300编译配置使能pwm leds功能
15. 2k300的gmac的phy-mode默认使用rgmii-id
16. 2k300先锋派设置YT8531的内部延迟
17. YT8531 phy 支持设置led的工作模式
18. LCD屏幕 支持cmdline的panel属性选择某一款板卡的dts配置，实现屏幕切换
19. 添加脚本用于快速选择板卡配置文件
20. 添加CAN驱动
21. 添加音频驱动
22. 优化OTG兼容性

Signed-off-by: maoxiaochuan <maoxiaochuan@loongson.cn>
This commit is contained in:
maoxiaochuan
2025-02-13 16:03:32 +08:00
parent f70d65c829
commit 7ffd18ab9d
107 changed files with 17571 additions and 43 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/loongarch/Kconfig
+12 -1
View File
@@ -539,9 +539,20 @@ config BUILTIN_DTB
Built-in DTBs are generic enough and can be used as references.
config DTB_MATCH_BY_BOARD_NAME
bool "dtb match by board_name which from command line"
depends on BUILTIN_DTB
default y
help
Base name (without suffix, relative to arch/loongarch/boot/dts/)
for the DTS file that will be used to produce the DTB linked into
the kernel.
support match dtb by board_name which from command line
so that bootloader given this value in command line
config BUILTIN_DTB_NAME
string "Source file for built-in dtb"
depends on BUILTIN_DTB
depends on BUILTIN_DTB && !DTB_MATCH_BY_BOARD_NAME
help
Base name (without suffix, relative to arch/loongarch/boot/dts/)
for the DTS file that will be used to produce the DTB linked into
arch/loongarch/boot/dts/Makefile
+6 -1
View File
@@ -1,5 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
# dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
ifdef CONFIG_DTB_MATCH_BY_BOARD_NAME
dtb-$(CONFIG_LOONGSON_2K300) += ls2k300_mini_dp.dtb ls2k300_vanguard_pi.dtb ls2k300_tewei.dtb
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
else
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
endif
arch/loongarch/boot/dts/loongson2k300.dtsi
+897
View File
@@ -0,0 +1,897 @@
/dts-v1/;
#include <dt-bindings/clock/loongson2k300-clock.h>
#include <dt-bindings/usb/dwc2-loongson-fix.h>
/ {
model = "loongson,generic";
compatible = "loongson,loongson3";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
serial6 = &uart6;
serial7 = &uart7;
serial8 = &uart8;
serial9 = &uart9;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
spi0 = &spi0;
spi1 = &spi1;
spi2 = &spi2;
spi3 = &spi3;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
};
};
cpu0: cpu@10000 {
device_type = "cpu";
compatible = "loongarch";
reg=<0>;
numa-node-id = <0>;
};
};
cpuintc: interrupt-controller {
compatible = "loongson,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
liointc0: icu0 {
compatible = "loongson,liointc-2.0";
reg = <0 0x16001400 0 0x40>,
<0 0x16001040 0 0x8>;
reg-names = "main", "isr0";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-names = "int0";
loongson,parent_int_map = <0xffffffff>, /* int0 */
<0x00000000>, /* int1 */
<0x00000000>, /* int2 */
<0x00000000>; /* int3 */
};
liointc1: icu1 {
compatible = "loongson,liointc-2.0";
reg = <0 0x16001440 0 0x40>,
<0 0x16001048 0 0x8>;
reg-names = "main", "isr0";
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <4>;
interrupt-names = "int2";
loongson,parent_int_map = <0x00000000>, /* int0 */
<0x00000000>, /* int1 */
<0xffffffff>, /* int2 */
<0x00000000>; /* int3 */
};
// icu: interrupt-controller@16001400 {
// compatible = "loongson,2k500-icu";
// interrupt-controller;
// #interrupt-cells = <1>;
// reg = <0 0x16001400 0 0x40
// 0 0x16001040 0 16>;
// interrupt-parent = <&cpuic>;
// interrupt-names = "cascade";
// interrupts = <4>;
// };
// extioiic: interrupt-controller@16000100 {
// compatible = "loongson,extioi-interrupt-controller";
// interrupt-controller;
// #interrupt-cells = <1>;
// interrupt-parent = <&cpuic>;
// interrupts = <3>;
// interrupt-names = "cascade";
// vec_count=<128>;
// misc_func=<0x100>;
// eio_en_off=<27>;
// default-irq-domain;
// };
pinmux: pinmux@16000490 {
compatible = "pinctrl-single";
reg = <0 0x16000490 0 0x20>;
#address-cells = <1>;
#size-cells = <0>;
#pinctrl-cells = <2>;
pinctrl-single,bit-per-mux;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x3>;
uart1_pins: pinmux_G42_G43_as_uart1 {
pinctrl-single,bits = <0x8 0x00f00000 0x00f00000>;
};
uart2_pins: pinmux_G44_G45_as_uart2 {
pinctrl-single,bits = <0x8 0x0f000000 0x0f000000>;
};
uart3_pins: pinmux_G46_G47_as_uart3 {
pinctrl-single,bits = <0x8 0xf0000000 0xf0000000>;
};
uart4_pins: pinmux_G62_G63_as_uart4 {
pinctrl-single,bits = <0xc 0xa0000000 0xf0000000>;
};
uart5_pins: pinmux_G64_G65_as_uart5 {
pinctrl-single,bits = <0x10 0x0000000a 0x0000000f>;
};
uart6_pins: pinmux_G60_G61_as_uart6 {
pinctrl-single,bits = <0xc 0x0a000000 0x0f000000>;
};
uart7_pins: pinmux_G68_G69_as_uart7 {
pinctrl-single,bits = <0x10 0x00000a00 0x00000f00>;
};
uart8_pins: pinmux_G70_G71_as_uart8 {
pinctrl-single,bits = <0x10 0x0000a000 0x0000f000>;
};
uart9_pins: pinmux_G66_G67_as_uart9 {
pinctrl-single,bits = <0x10 0x000000a0 0x000000f0>;
};
gmac1_pins: pinmux_G44_G55_as_gmac1 {
pinctrl-single,bits = <0x8 0x55000000 0xff000000
0xc 0x00005555 0x0000ffff>;
};
i2c0_pins: pinmux_G48_G49_as_i2c0 {
pinctrl-single,bits = <0xc 0x0000000f 0x0000000f>;
};
i2c1_pins: pinmux_G50_G51_as_i2c1 {
pinctrl-single,bits = <0xc 0x000000f0 0x000000f0>;
};
i2c1_as_gpio: pinmux_G50_G51_as_gpio {
pinctrl-single,bits = <0xc 0x00000000 0x000000f0>;
};
i2c2_pins: pinmux_G52_G53_as_i2c2 {
pinctrl-single,bits = <0xc 0x00000f00 0x00000f00>;
};
i2c3_pins: pinmux_G54_G55_as_i2c3 {
pinctrl-single,bits = <0xc 0x0000f000 0x0000f000>;
};
spi1_pins: pinmux_G60_G63_as_spi1 {
pinctrl-single,bits = <0xc 0xff000000 0xff000000>;
};
spi2_pins: pinmux_G64_G67_as_spi2 {
pinctrl-single,bits = <0x10 0x000000ff 0x000000ff>;
};
spi2_cs_as_gpio: pinmux_G64_G66_as_spi2 {
pinctrl-single,bits = <0x10 0x0000003f 0x000000ff>;
};
can0_pins: pinmux_G68_G69_as_can0 {
pinctrl-single,bits = <0x10 0x00000f00 0x00000f00>;
};
can0_as_gpio_pins: pinmux_G68_G69_as_gpio {
pinctrl-single,bits = <0x10 0x00000000 0x00000f00>;
};
can1_pins: pinmux_G70_G71_as_can1 {
pinctrl-single,bits = <0x10 0x0000f000 0x0000f000>;
};
can1_as_gpio_pins: pinmux_G70_G71_as_gpio {
pinctrl-single,bits = <0x10 0x00000000 0x0000f000>;
};
can2_pins: pinmux_G72_G73_as_can2 {
pinctrl-single,bits = <0x10 0x000f0000 0x000f0000>;
};
can2_as_gpio_pins: pinmux_G72_G73_as_gpio {
pinctrl-single,bits = <0x10 0x00000000 0x000f0000>;
};
can3_pins: pinmux_G74_G75_as_can3 {
pinctrl-single,bits = <0x10 0x00f00000 0x00f00000>;
};
can3_as_gpio_pins: pinmux_G74_G75_as_gpio {
pinctrl-single,bits = <0x10 0x00000000 0x00f00000>;
};
i2s_pins: pinmux_G76_G80_as_i2s {
pinctrl-single,bits = <0x10 0xff000000 0xff000000
0x14 0x00000003 0x00000003>;
};
pwm0_pins: pinmux_G86_as_pwm0 {
pinctrl-single,bits = <0x14 0x00002000 0x00003000>;
};
pwm1_pins: pinmux_G87_as_pwm1 {
pinctrl-single,bits = <0x14 0x00008000 0x0000c000>;
};
pwm2_pins: pinmux_G88_as_pwm2 {
pinctrl-single,bits = <0x14 0x00020000 0x00030000>;
};
pwm3_pins: pinmux_G89_as_pwm3 {
pinctrl-single,bits = <0x14 0x00080000 0x000c0000>;
};
tim1_ch1:pinmux_G81_as_tim1_ch1 {
pinctrl-single,bits = <0x14 0x0000000c 0x0000000c>;
};
tim1_ch1n:pinmux_G84_as_tim1_ch1n {
pinctrl-single,bits = <0x14 0x00000300 0x000000300>;
};
tim1_ch2n:pinmux_G85_as_tim1_ch2n {
pinctrl-single,bits = <0x14 0x00000c00 0x000000c00>;
};
tim1_ch3n:pinmux_G86_as_tim1_ch3n {
pinctrl-single,bits = <0x14 0x00003000 0x000003000>;
};
tim2_ch1:pinmux_G87_as_tim2_ch1 {
pinctrl-single,bits = <0x14 0x0000c000 0x00000c000>;
};
tim2_ch2:pinmux_G88_as_tim2_ch2 {
pinctrl-single,bits = <0x14 0x00030000 0x00030000>;
};
sdio0_pins: pinmux_G90_G99_as_sdio {
pinctrl-single,bits = <0x14 0xfff00000 0xfff00000
0x18 0x000000ff 0x000000ff>;
};
sdio1_pins: pinmux_G100_G105_as_sdio {
pinctrl-single,bits = <0x18 0x000fff00 0x000fff00>;
};
};
soc: 2k300-soc {
compatible = "ls,nbus", "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0x10000000 0 0x10000000 0 0x10000000
0 0x2000000 0 0x2000000 0 0x4000000
0 0x40000000 0 0x40000000 0 0x40000000
0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
osc_clk: osc-clock {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <120000000>;
clock-output-names = "ref_clk";
};
clocks:clock-controller@0x16000400{
compatible = "loongson,ls2k300-clk";
reg = <0 0x16000400 0 0x28>;
clocks = <&osc_clk>;
clock-names = "ref_clk";
#clock-cells = <1>;
};
isa@16400000 {
compatible = "isa";
#size-cells = <1>;
#address-cells = <2>;
ranges = <1 0 0 0x16400000 0x4000>;
};
uart0: serial@0x16100000 {
compatible = "ns16550a";
reg = <0 0x16100000 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
};
uart1: serial@0x16100400 {
compatible = "ns16550a";
reg = <0 0x16100400 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart2: serial@0x16100800 {
compatible = "ns16550a";
reg = <0 0x16100800 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart3: serial@0x16100c00 {
compatible = "ns16550a";
reg = <0 0x16100c00 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart3_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart4: serial@0x16101000 {
compatible = "ns16550a";
reg = <0 0x16101000 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&uart4_pins>;
pinctrl-names = "default";
no-loopback-test;
status = "disabled";
};
uart5: serial@0x16101400 {
compatible = "ns16550a";
reg = <0 0x16101400 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart5_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart6: serial@0x16101800 {
compatible = "ns16550a";
reg = <0 0x16101800 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart6_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart7: serial@0x16101c00 {
compatible = "ns16550a";
reg = <0 0x16101c00 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart7_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart8: serial@0x16102000 {
compatible = "ns16550a";
reg = <0 0x16102000 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart8_pins>;
pinctrl-names = "default";
status = "disabled";
};
uart9: serial@0x16102400 {
compatible = "ns16550a";
reg = <0 0x16102400 0 0x10>;
clock-frequency = <200000000>;
interrupt-parent = <&liointc0>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
pinctrl-0 = <&uart9_pins>;
pinctrl-names = "default";
status = "disabled";
};
dc: dc@0x16090000 {
compatible = "loongson,ls2k0300-dc";
reg = <0 0x16090000 0 0x00010000>;
interrupt-parent = <&liointc1>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; // 51 - 32 = 19
dma-mask = <0x00000000 0xffffffff>;
#address-cells = <1>;
#size-cells = <0>;
lsdc,relax_alignment;
status = "disabled";
dvo0: dvo@0 {
compatible = "lsdc,dvo";
/* 0 for connector 0 (DVO0) */
reg = <0>;
connector = "panel";
};
};
wdt: syscon@0x16124000 {
compatible = "loongson,ls2x-wdt", "syscon";
reg = <0 0x16124000 0 0xC>;
clocks = <&clocks CLK_APB>;
clock-names = "wdt-clk";
status = "okay";
};
reboot {
compatible ="syscon-reboot";
regmap = <&wdt>;
offset = <0x00>;
mask = <0x1>;
};
adc: adc@0x1611c000 {
compatible = "ls2k300-adc";
reg = <0 0x1611c000 0 0x50>;
status = "disabled";
};
gmac0: ethernet@0x16020000 {
compatible = "snps,dwmac-3.70a";
reg = <0 0x16020000 0 0x7fff>;
interrupt-parent = <&liointc1>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; // 49 - 32 = 17
interrupt-names = "macirq";
dma-mask = <0xffffffff 0xffffffff>;
phy-mode = "rgmii-id";
// pinctrl-0 = <&gmac0_pins>;
// pinctrl-names = "default";
snps,pbl = <32>;
status = "disabled";
};
gmac1: ethernet@0x16030000 {
compatible = "snps,dwmac-3.70a";
reg = <0 0x16030000 0 0x7fff>;
interrupt-parent = <&liointc1>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; // 50 - 32 = 18
interrupt-names = "macirq";
dma-mask = <0xffffffff 0xffffffff>;
phy-mode = "rgmii-id";
pinctrl-0 = <&gmac1_pins>;
pinctrl-names = "default";
snps,pbl = <32>;
status = "disabled";
};
gpio: gpio@0x16104000 {
compatible = "loongson,ls2k0300-gpio";
reg = <0 0x16104000 0 0x1000>;
ngpios = <106>;
gpio_base = <0>;
gpio-controller;
#gpio-cells = <2>;
loongson,vhwirq-base = <128>;
interrupt-controller;
#interrupt-cells = <2>;
// 可选传统中断与扩展中断
#if 1
interrupt-parent =<&liointc1>;
interrupts =
<21 IRQ_TYPE_LEVEL_HIGH>, <22 IRQ_TYPE_LEVEL_HIGH>, <23 IRQ_TYPE_LEVEL_HIGH>, <24 IRQ_TYPE_LEVEL_HIGH>,
<25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, <27 IRQ_TYPE_LEVEL_HIGH>;
// base 32 x - 32
loongson,irqpin-group =
<0 16>, <16 16>, <32 16>, <48 16>,
<64 16>, <80 16>, <96 11>;
#else
interrupt-parent =<&extioiic>;
interrupts =
<79>, <80>, <81>, <82>,
<83>, <84>, <85>, <86>,
<87>, <88>, <89>, <90>,
<91>, <92>, <93>, <94>,
<95>, <96>, <97>, <98>,
<99>, <100>, <101>, <102>,
<103>, <104>, <105>;
loongson,irqpin-group =
<0 4>, <4 4>, <8 4>, <12 4>,
<16 4>, <20 4>, <24 4>, <28 4>,
<32 4>, <36 5>, <40 4>, <44 4>,
<48 4>, <52 4>, <56 4>, <60 4>,
<64 4>, <68 4>, <72 4>, <76 4>,
<80 4>, <84 4>, <88 4>, <92 4>,
<96 4>, <100 4>, <104 2>;
#endif
};
can0: can@0x16110000 {
compatible = "loongson,ls-canfd";
reg = <0 0x16110000 0 0x400>;
ls,clock-frequency = <200000000>;
ls,canfd-dmarx;
interrupt-parent = <&liointc0>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&can0_pins>;
pinctrl-1 = <&can0_as_gpio_pins>;
pinctrl-names = "default", "isolate";
ls,canfd-tx-gpio = <&gpio 69 GPIO_ACTIVE_HIGH>;
dmas = <&dma 0 0xaae>;
dma-names = "rx";
status = "disabled";
};
can1: can@0x16111000 {
compatible = "loongson,ls-canfd";
reg = <0 0x16110400 0 0x400>;
ls,clock-frequency = <200000000>;
ls,canfd-dmarx;
interrupt-parent = <&liointc0>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&can1_pins>;
pinctrl-1 = <&can1_as_gpio_pins>;
pinctrl-names = "default", "isolate";
ls,canfd-tx-gpio = <&gpio 71 GPIO_ACTIVE_HIGH>;
dmas = <&dma 1 0xaae>;
dma-names = "rx";
status = "disabled";
};
can2: can@0x16112000 {
compatible = "loongson,ls-canfd";
reg = <0 0x16110800 0 0x400>;
ls,clock-frequency = <200000000>;
ls,canfd-dmarx;
interrupt-parent = <&liointc0>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&can2_pins>;
pinctrl-1 = <&can2_as_gpio_pins>;
pinctrl-names = "default", "isolate";
ls,canfd-tx-gpio = <&gpio 73 GPIO_ACTIVE_HIGH>;
dmas = <&dma 2 0xaae>;
dma-names = "rx";
status = "disabled";
};
can3: can@0x16113000 {
compatible = "loongson,ls-canfd";
reg = <0 0x16110c00 0 0x400>;
ls,clock-frequency = <200000000>;
ls,canfd-dmarx;
interrupt-parent = <&liointc0>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&can3_pins>;
pinctrl-1 = <&can3_as_gpio_pins>;
pinctrl-names = "default", "isolate";
ls,canfd-tx-gpio = <&gpio 75 GPIO_ACTIVE_HIGH>;
dmas = <&dma 3 0xaae>;
dma-names = "rx";
status = "disabled";
};
spi0: spi@0x16010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "loongson,ls-spi";
reg = <0 0x16010000 0 0x10>;
interrupt-parent = <&liointc1>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; // 44 - 32 = 12
clock-frequency = <200000000>;
status = "disabled";
};
spi1: spi@0x16018000 {
compatible = "loongson,ls-spi";
reg = <0 0x16018000 0 0x10>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&liointc1>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; // 45 - 32 = 13
clock-frequency = <200000000>;
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
status = "disabled";
};
spi2: spi@0x1601c000 {
compatible = "loongson,ls-spi-io";
reg = <0 0x1610c000 0 0x2000>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <200000000>;
pinctrl-0 = <&spi2_pins>;
pinctrl-names = "default";
status = "disabled";
};
spi3: spi@0x1601e000 {
compatible = "loongson,ls-spi-io";
reg = <0 0x1610e000 0 0x2000>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <200000000>;
status = "disabled";
};
i2c0: i2c0@0x16108000 {
compatible = "loongson,lsfs-i2c";
reg = <0 0x16108000 0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&liointc0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
i2c1: i2c1@0x16109000 {
compatible = "loongson,lsfs-i2c";
reg = <0 0x16109000 0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&liointc0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
i2c2: i2c2@0x1610a000 {
compatible = "loongson,lsfs-i2c";
reg = <0 0x1610a000 0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&liointc0>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
i2c3: i2c3@0x1610b000 {
compatible = "loongson,lsfs-i2c";
reg = <0 0x1610b000 0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&liointc0>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
dma: dma@0x1612c000{
compatible = "loongson,lsia-dma";
reg = <0 0x1612c000 0 0x100>;
#config-nr = <2>;
interrupt-parent = <&liointc0>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>, <24 IRQ_TYPE_LEVEL_HIGH>,
<25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>, <28 IRQ_TYPE_LEVEL_HIGH>,
<29 IRQ_TYPE_LEVEL_HIGH>, <30 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <2>;
dma-channels = <8>;
};
emmc: sdio@0x16140000 {
#address-cells = <2>;
compatible = "loongson,ls2k_sdio_1.2";
reg = <0 0x16140000 0 0x1000>;
interrupt-parent = <&liointc0>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
//interrupt-parent = <&icu>;
//interrupts = <53>;
interrupt-names = "ls2k_mci_irq";
dma-mask = <0xffffffff 0xffffffff>;
clock-frequency = <0 200000000>;
bus-width = <8>;
cap-mmc-highspeed;
#if CONFIG_LOONGSON_MMC_HIGH_PERFORMANCE
mmc-hs200-1_8v;
#endif
no-sd;
no-sdio;
};
sdio1: sdio@0x16148000 {
#address-cells = <2>;
compatible = "loongson,ls2k_sdio_1.2";
reg = <0 0x16148000 0 0x8000>;
interrupt-parent = <&liointc1>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; // 32 - 32 = 0
interrupt-names = "ls2k_mci_irq";
dma-mask = <0xffffffff 0xffffffff>;
clock-frequency = <0 200000000>;
status = "disabled";
};
ohci@0x16088000 {
compatible = "generic-ohci";
reg = <0 0x16088000 0 0x8000>;
interrupt-parent = <&liointc1>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; // 47 - 32 = 15
dma-mask = <0x0 0xffffffff>;
};
ehci@0x16080000 {
compatible = "generic-ehci";
reg = <0 0x16080000 0 0x8000>;
interrupt-parent = <&liointc1>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; // 46 - 32 = 14
dma-mask = <0x0 0xffffffff>;
};
otg@0x16040000 {
compatible = "loongson,loongson2-dwc2";
reg = <0 0x16040000 0 0x40000>;
interrupt-parent = <&liointc1>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; // 48 - 32 = 16
dma-mask = <0x0 0xffffffff>;
loongson,dwc2-fix = <DWC2_LOONGSON_FIX_DELAY>;
//dr_mode = "peripheral";
/* Optional for that dr_mode = "host" or dr_mode = "peripheral" */
};
pwm0: pwm@0x1611b000 {
compatible = "loongson,ls2k-pwm";
reg = <0 0x1611b000 0 0xf>;
interrupt-parent = <&liointc0>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
pwm1: pwm@0x1611b010 {
compatible = "loongson,ls2k-pwm";
reg = <0 0x1611b010 0 0xf>;
interrupt-parent = <&liointc0>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
pwm2: pwm@0x1611b020 {
compatible = "loongson,ls2k-pwm";
reg = <0 0x1611b020 0 0xf>;
interrupt-parent = <&liointc0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm2_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
pwm3: pwm@0x1611b030 {
compatible = "loongson,ls2k-pwm";
reg = <0 0x1611b030 0 0xf>;
interrupt-parent = <&liointc0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm3_pins>;
pinctrl-names = "default";
clock-frequency = <200000000>;
status = "disabled";
};
rtc0: rtc@0x16128000{
compatible = "loongson,ls2k-rtc";
reg = <0 0x16128000 0 0x100>;
interrupt-parent = <&liointc1>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; // 41 - 32 = 9
status = "disabled";
};
tsensor: tsensor@0x16001500 {
compatible = "loongson,ls2k300-thermal";
reg = <0 0x16001500 0 0x30>;
id = <0>;
interrupt-parent = <&liointc1>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; // 52 - 32 = 20
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tsensor 0>;
trips {
cpu_alert: cpu-alert {
temperature = <55000>;
hysteresis = <5000>;
type = "active";
};
cpu_crit: cpu-crit {
temperature = <125000>;
hysteresis = <5000>;
type = "critical";
};
};
};
};
i2s: i2s@0x16114000{
compatible = "loongson,ls2k0300-i2s";
reg = <0 0x16114000 0 0x4000>;
interrupt-parent = <&liointc0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <100000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s_pins>;
status = "disabled";
};
audio: audio@0x16114000 {
compatible = "loongson,ls-pcm-generic-audio";
reg = <0 0x16114000 0 0x4000>;
dmas = <&dma 0 0xaf
&dma 1 0xbf>;
dma-names = "i2s_record", "i2s_play";
dma-mask = <0xffffffff 0xffffffff>;
status = "disabled";
};
sound: sound{
compatible = "loongson,ls-sound";
loongson,i2s-controller = <&i2s>;
status = "disabled";
};
};
};
arch/loongarch/boot/dts/loongson_panel_param.dtsi
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/ {
panel_param: panel_param_set {
#address-cells = <1>;
#size-cells = <0>;
panel-BP101WX1-206 {
width-mm = <223>;
height-mm = <125>;
label = "BP101WX1-206";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <71000000>;
hactive = <1280>;
vactive = <800>;
hsync-len = <32>;
hfront-porch = <8>;
hback-porch = <10>;
vfront-porch = <3>;
vback-porch = <3>;
vsync-len = <6>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
panel-ATK-MD0430R-800x480 {
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <40>;
hfront-porch = <48>;
hback-porch = <40>;
vfront-porch = <13>;
vback-porch = <32>;
vsync-len = <0>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
panel-ATK-MD0700R-1024x600 {
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0700R-1024x600";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <51200000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <20>;
hfront-porch = <160>;
hback-porch = <140>;
vfront-porch = <12>;
vback-porch = <20>;
vsync-len = <3>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
panel-ATK-MD1010R-1280x800{
width-mm = <229>;
height-mm = <149>;
label = "ATK-MD1010R-1280x800";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <71100000>;
hactive = <1280>;
vactive = <800>;
hsync-len = <10>;
hfront-porch = <70>;
hback-porch = <80>;
vfront-porch = <10>;
vback-porch = <10>;
vsync-len = <3>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
};
};
};
arch/loongarch/boot/dts/ls2k300_g2k03z0_core_v10.dtsi
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "loongson2k300.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon";
};
/* not need memory node, we get memory info from boot params. */
//memory {
// name = "memory";
// device_type = "memory";
// reg = <0 0x00200000 0 0x0ee00000
// 0 0x90000000 0 0x10000000>;
//};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x02000000>;
linux,cma-default;
};
};
};
&uart0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
reg = <0>;
};
};
&gmac0 {
status = "okay";
phy-handle = <&yt8511h0>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
yt8511h0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
motorcomm,led0_cfg = <0x40>; //千兆常亮
motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮
motorcomm,led2_cfg = <0x2600>; //有数据时闪烁
};
};
};
arch/loongarch/boot/dts/ls2k300_mini_dp.dts
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#include "ls2k300_g2k03z0_core_v10.dtsi"
#include "loongson_panel_param.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "LS2K300-MINI-DP";
leds {
compatible = "gpio-leds";
led1 {
label = "led1";
gpios = <&gpio 85 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
lcd_backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 84 GPIO_ACTIVE_HIGH>;
default-on;
};
panel: dvo-connector@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "panel-lvds", "auo,b101ean01";
backlight = <&lcd_backlight>;
/* lcd power on control gpio */
// enable-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
// power-supply = <&vdd_lcd>;
#if 0 // 4.3' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <40>;
hfront-porch = <48>;
hback-porch = <40>;
vfront-porch = <13>;
vback-porch = <32>;
vsync-len = <1>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#else // 7' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0700R-1024x600";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <51200000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <20>;
hfront-porch = <160>;
hback-porch = <140>;
vfront-porch = <12>;
vback-porch = <20>;
vsync-len = <3>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#endif
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dvo_connector_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc_out_rgb0>;
};
};
};
};
&dc {
status = "ok"
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dc_out_rgb0: endpoint {
remote-endpoint = <&dvo_connector_in>;
};
};
};
};
&i2c0 {
status = "ok"
};
&i2c1 {
status = "ok"
// 两款芯片不能同时支持，因为用同一个GPIO
// 但可以在两个屏幕间切换
// 4.3寸触屏芯片
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
// 2K300 GPIO 支持中断控制
// GPIO 中断号为 vhwirq-base + pinnum (210 = 128 + 82)
interrupt-parent = <&gpio>;
interrupts = <210 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
};
// 7寸触屏芯片
touchpad_1: gt911@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
interrupt-parent = <&gpio>;
interrupts = <210 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
};
};
&i2c2 {
status = "ok"
};
&i2c3 {
status = "ok"
};
&uart1 {
status = "ok"
};
&uart2 {
status = "ok"
};
&uart3 {
status = "ok"
};
&pwm0 {
status = "ok"
};
&pwm1 {
status = "ok"
};
&pwm2 {
status = "ok"
};
&pwm3 {
status = "ok"
};
&can0 {
status = "ok"
};
&can1 {
status = "ok"
};
&can2 {
status = "ok"
};
&can3 {
status = "ok"
};
&spi1 {
status = "ok"
spidev0@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&spi2 {
status = "ok"
spidev1@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <25000000>;
};
};
&adc {
status = "okay";
};
&rtc0 {
status = "okay";
};
&sdio1 {
pinctrl-0 = <&sdio1_pins>;
pinctrl-names = "default";
cap-sd-highspeed;
cap-mmc-highspeed;
bus-width = <4>;
cd-gpios = <&gpio 81 GPIO_ACTIVE_LOW>;
status = "okay";
};
arch/loongarch/boot/dts/ls2k300_tewei.dts
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#include "ls2k300_g2k03z0_core_v10.dtsi"
#include "loongson_panel_param.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "LS2K300-TEWEI";
leds {
compatible = "gpio-leds";
run_led {
label = "run_led";
gpios = <&gpio 85 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
err_led {
label = "err_led";
gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
lcd_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm0 0 5000000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
panel: dvo-connector@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "panel-lvds", "auo,b101ean01";
backlight = <&lcd_backlight>;
width-mm = <261>;
height-mm = <163>;
label = "TM121JDGP30-1280x800";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <72200000>;
hactive = <1280>;
vactive = <800>;
hsync-len = <4>;
hfront-porch = <72>;
hback-porch = <84>;
vfront-porch = <15>;
vback-porch = <23>;
vsync-len = <4>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dvo_connector_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc_out_rgb0>;
};
};
};
vccio_codec: 3_3V{
compatible = "regulator-fixed";
regulator-name = "VCC_IO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
// 虽然这个时钟在从模式下没用，但 es8388 驱动必须指定这个时钟
es8388_clk: es8388-clock {
compatible = "fixed-clock";
clock-frequency = <12288000>;
#clock-cells = <1>;
};
};
&dc {
status = "ok"
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dc_out_rgb0: endpoint {
remote-endpoint = <&dvo_connector_in>;
};
};
};
};
&i2c0 {
status = "ok"
lm75bdp@48 {
compatible = "national,lm75b";
reg = <0x48>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
};
&i2c1 {
status = "ok"
codec: es8388@11{
compatible = "everest,es8388";
reg = <0x11>;
AVDD-supply = <&vccio_codec>;
DVDD-supply = <&vccio_codec>;
HPVDD-supply = <&vccio_codec>;
PVDD-supply = <&vccio_codec>;
clocks = <&es8388_clk 0>;
};
};
&i2c2 {
status = "ok"
pcf8574@20 {
compatible = "nxp,pcf8574";
reg = <0x20>;
// 2K300 GPIO 支持中断控制
// GPIO 中断号为 vhwirq-base + pinnum (216 = 128 + 88)
interrupt-parent = <&gpio>;
interrupts = <216 0>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
&i2c3 {
status = "ok"
};
&uart1 {
status = "ok"
};
&uart2 {
status = "ok"
};
&uart3 {
status = "ok"
};
&can2 {
status = "ok"
};
&spi1 {
status = "ok"
spi_wk2xxx0: spi_wk2xxx@0 {
status = "okay";
compatible = "wkmic,wk2124_spi";
reg = <0x0>;
spi-max-frequency = <10000000>;
reset-gpio = <&gpio 83 GPIO_ACTIVE_HIGH>;
irq-gpio = <&gpio 84 IRQ_TYPE_EDGE_FALLING>;
use-common-reset-gpio;
};
};
&spi2 {
status = "ok"
spi_wk2xxx1: spi_wk2xxx@0 {
status = "okay";
compatible = "wkmic,wk2124_spi";
reg = <0x0>;
spi-max-frequency = <10000000>;
reset-gpio = <&gpio 83 GPIO_ACTIVE_HIGH>;
irq-gpio = <&gpio 69 IRQ_TYPE_EDGE_FALLING>;
use-common-reset-gpio;
};
};
&rtc0 {
status = "okay";
};
&sdio1 {
pinctrl-0 = <&sdio1_pins>;
pinctrl-names = "default";
cap-sd-highspeed;
cap-mmc-highspeed;
bus-width = <4>;
cd-gpios = <&gpio 81 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm0 {
status = "okay";
#pwm-cells = <3>;
};
&i2s {
status = "okay";
//slave-mode;
//mclk-fixed = <12288000>;
};
&audio {
status = "okay";
};
&sound {
status = "okay";
loongson,audio-codec = <&codec>;
// Easy Compatible for asound.state Configure
loongson,sound-card-name = "ES8388";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi.dts
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@@ -0,0 +1,80 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ls2k300_vanguard_pi_common.dtsi"
&uart2 {
status = "ok"
};
&uart5 {
status = "disabled";
};
&uart6 {
status = "disabled";
};
&uart7 {
status = "disabled";
};
&uart8 {
status = "disabled";
};
&spi1 {
status = "okay";
spidev0@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <25000000>;
};
};
&spi2 {
status = "ok"
pinctrl-0 = <&spi2_cs_as_gpio>;
pinctrl-names = "default";
num-chipselects = <2>;
cs-gpios = <&gpio 67 0>,
<&gpio 85 0>;
spidev1@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <25000000>;
};
spidev2@1 {
compatible = "rohm,dh2228fv";
reg = <1>;
spi-max-frequency = <25000000>;
};
};
&can0 {
status = "disabled";
};
&can1 {
status = "disabled";
};
&can2 {
status = "disabled";
};
&can3 {
status = "disabled";
};
&pwm0 {
status = "okay";
};
&pwm1 {
status = "okay";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi_common.dtsi
+251
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "loongson2k300.dtsi"
#include "loongson_panel_param.dtsi"
/ {
model = "LS2K300-PAI";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon";
};
/* not need memory node, we get memory info from boot params. */
leds {
compatible = "gpio-leds";
led1 {
label = "led1";
gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
lcd_backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
default-on;
};
panel: dvo-connector@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "panel-lvds", "auo,b101ean01";
backlight = <&lcd_backlight>;
/* lcd power on control gpio */
// enable-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
// power-supply = <&vdd_lcd>;
#if 0 // 4.3' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <40>;
hfront-porch = <48>;
hback-porch = <40>;
vfront-porch = <13>;
vback-porch = <32>;
vsync-len = <1>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#else // 7' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0700R-1024x600";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <51200000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <20>;
hfront-porch = <160>;
hback-porch = <140>;
vfront-porch = <12>;
vback-porch = <20>;
vsync-len = <3>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#endif
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dvo_connector_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc_out_rgb0>;
};
};
};
vccio_codec: 3_3V{
compatible = "regulator-fixed";
regulator-name = "VCC_IO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
// 虽然这个时钟在从模式下没用，但 es8388 驱动必须指定这个时钟
es8388_clk: es8388-clock {
compatible = "fixed-clock";
clock-frequency = <12288000>;
#clock-cells = <1>;
};
};
&uart0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
reg = <0>;
};
};
&gmac0 {
status = "okay";
phy-handle = <&yt8511h0>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
yt8511h0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
rx-internal-delay-ps = <450>;
tx-internal-delay-ps = <150>;
motorcomm,led0_cfg = <0x40>; //千兆常亮
motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮
motorcomm,led2_cfg = <0x2600>; //有数据时闪烁
};
};
};
&dc {
status = "ok"
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dc_out_rgb0: endpoint {
remote-endpoint = <&dvo_connector_in>;
};
};
};
};
&i2c0 {
status = "ok"
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
// 2K300 GPIO 支持中断控制
// GPIO 中断号为 vhwirq-base + pinnum (170 = 128 + 42)
interrupt-parent = <&gpio>;
interrupts = <170 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio 55 GPIO_ACTIVE_LOW>;
};
};
&i2c1 {
status = "ok"
};
&i2c2 {
status = "okay";
codec: es8388@11{
compatible = "everest,es8388";
reg = <0x11>;
AVDD-supply = <&vccio_codec>;
DVDD-supply = <&vccio_codec>;
HPVDD-supply = <&vccio_codec>;
PVDD-supply = <&vccio_codec>;
clocks = <&es8388_clk 0>;
};
};
&can0 {
status = "disabled";
};
&can1 {
status = "disabled";
};
&can2 {
status = "disabled";
};
&can3 {
status = "disabled";
};
&adc {
status = "okay";
};
&rtc0 {
status = "okay";
};
&sdio1 {
pinctrl-0 = <&sdio1_pins>;
pinctrl-names = "default";
cap-sd-highspeed;
cap-mmc-highspeed;
bus-width = <4>;
cd-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2s {
status = "okay";
//slave-mode;
//mclk-fixed = <12288000>;
};
&audio {
status = "okay";
};
&sound {
status = "okay";
loongson,audio-codec = <&codec>;
// Easy Compatible for asound.state Configure
loongson,sound-card-name = "ES8388";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi_factory.dts
+48
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ls2k300_vanguard_pi_common.dtsi"
/ {
factory {
tags = "factory-test";
};
};
&uart2 {
status = "disable"
};
&uart5 {
status = "disabled";
};
&uart6 {
status = "disabled";
};
&uart7 {
status = "disabled";
};
&uart8 {
status = "disabled";
};
&can0 {
status = "disabled";
};
&can1 {
status = "disabled";
};
&can2 {
status = "disabled";
};
&can3 {
status = "disabled";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi_func2.dts
+58
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ls2k300_vanguard_pi_common.dtsi"
&uart2 {
status = "okay";
};
&uart4 {
status = "okay";
};
&uart5 {
status = "okay";
};
&uart6 {
status = "okay";
};
&uart7 {
status = "disabled";
};
&uart8 {
status = "disabled";
};
&uart9 {
status = "okay";
};
&spi1 {
status = "disabled";
};
&spi2 {
status = "disabled";
};
&can0 {
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "okay";
};
&can3 {
status = "okay";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi_pihat.dts
+74
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "ls2k300_vanguard_pi_common.dtsi"
/ {
onewire {
compatible = "w1-gpio";
gpios = <&gpio 68 GPIO_ACTIVE_HIGH>;
};
};
&uart2 {
status = "ok"
};
&uart5 {
status = "disabled";
};
&uart6 {
status = "disabled";
};
&uart7 {
status = "disabled";
};
&uart8 {
status = "disabled";
};
&spi1 {
status = "disabled";
};
&spi2 {
status = "ok"
pinctrl-0 = <&spi2_cs_as_gpio>;
pinctrl-names = "default";
num-chipselects = <2>;
cs-gpios = <&gpio 67 0>,
<&gpio 85 0>;
mcp3004@0 {
compatible = "mcp3004";
reg = <0>;
spi-max-frequency = <1500000>;
};
spidev1@1 {
compatible = "rohm,dh2228fv";
reg = <1>;
spi-max-frequency = <25000000>;
};
};
&can0 {
status = "disabled";
};
&can1 {
status = "disabled";
};
&can2 {
status = "disabled";
};
&can3 {
status = "disabled";
};
arch/loongarch/boot/dts/ls2k300_vanguard_pi_v10.dts
+290
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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "loongson2k300.dtsi"
#include "loongson_panel_param.dtsi"
/ {
model = "LS2K300-PAI";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon";
};
/* not need memory node, we get memory info from boot params. */
//memory {
// name = "memory";
// device_type = "memory";
// reg = <0 0x00200000 0 0x0ee00000
// 0 0x90000000 0 0x10000000>;
//};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x02000000>;
linux,cma-default;
};
};
leds {
compatible = "gpio-leds";
led1 {
label = "led1";
gpios = <&gpio 54 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
panel: dvo-connector@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "panel-lvds", "auo,b101ean01";
//backlight = <&lcd_backlight>;
/* lcd power on control gpio */
// enable-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>;
// power-supply = <&vdd_lcd>;
#if 0 // 4.3' LCD
width-mm = <223>;
height-mm = <125>;
label = "ATK-MD0430R-800x480";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <27000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <40>;
hfront-porch = <48>;
hback-porch = <40>;
vfront-porch = <13>;
vback-porch = <32>;
vsync-len = <1>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#else // 7' LCD
width-mm = <180>;
height-mm = <110>;
label = "ATK-MD0700R-1024x600";
data-mapping = "jeida-24";
panel-timing {
clock-frequency = <51200000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <20>;
hfront-porch = <160>;
hback-porch = <140>;
vfront-porch = <12>;
vback-porch = <20>;
vsync-len = <3>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
#endif
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dvo_connector_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc_out_rgb0>;
};
};
};
vccio_codec: 3_3V{
compatible = "regulator-fixed";
regulator-name = "VCC_IO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
humidity_sensor {
compatible = "dht11-sensor";
SHT11-gpios = <&gpio 61 GPIO_ACTIVE_HIGH>;
status = "okay";
};
// 虽然这个时钟在从模式下没用，但 es8388 驱动必须指定这个时钟
es8388_clk: es8388-clock {
compatible = "fixed-clock";
clock-frequency = <11289600>;
#clock-cells = <1>;
};
onewire {
compatible = "w1-gpio";
gpios = <&gpio 68 GPIO_ACTIVE_HIGH>;
};
};
&uart0 {
status = "okay";
};
&spi0 {
status = "okay";
spi-flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <25000000>;
reg = <0>;
};
};
&gmac0 {
status = "okay";
phy-handle = <&yt8511h0>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
yt8511h0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
motorcomm,led0_cfg = <0x40>; //千兆常亮
motorcomm,led1_cfg = <0x30>; //百兆 十兆常亮
motorcomm,led2_cfg = <0x2600>; //有数据时闪烁
};
};
};
&dc {
status = "ok"
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dc_out_rgb0: endpoint {
remote-endpoint = <&dvo_connector_in>;
};
};
};
};
&i2c0 {
status = "ok"
codec: es8388@11{
compatible = "everest,es8388";
reg = <0x11>;
AVDD-supply = <&vccio_codec>;
DVDD-supply = <&vccio_codec>;
HPVDD-supply = <&vccio_codec>;
PVDD-supply = <&vccio_codec>;
clocks = <&es8388_clk 0>;
};
touchpad: gt9147@14 {
compatible = "goodix,gt9147";
reg = <0x14>;
// 2K300 GPIO 支持中断控制
// 暂时PCB布局有问题，所以随便写个引脚
// GPIO 中断号为 vhwirq-base + pinnum (181 = 128 + 53)
interrupt-parent = <&gpio>;
interrupts = <181 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
};
};
&i2c1 {
status = "ok"
};
// &i2c2 {
// status = "okay";
// };
&uart2 {
status = "ok"
};
// &can0 {
// status = "okay";
// };
// &can1 {
// status = "okay";
// };
// &can2 {
// status = "okay";
// };
// &can3 {
// status = "okay";
// };
// &spi1 {
// status = "okay";
// spidev0@0 {
// compatible = "rohm,dh2228fv";
// reg = <0>;
// spi-max-frequency = <50000000>;
// };
// };
&spi2 {
status = "ok"
mcp3004@0 {
compatible = "mcp3004";
reg = <0>;
spi-max-frequency = <1500000>;
};
};
&adc {
status = "okay";
};
&rtc0 {
status = "disable"
};
&sdio1 {
pinctrl-0 = <&sdio1_pins>;
pinctrl-names = "default";
cap-sd-highspeed;
cap-mmc-highspeed;
bus-width = <4>;
cd-gpios = <&gpio 82 GPIO_ACTIVE_LOW>;
status = "okay";
};
&i2s {
status = "okay";
};
&audio {
status = "okay";
};
&sound {
status = "okay";
};
arch/loongarch/configs/loongson_2k300_defconfig
+830
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@@ -0,0 +1,830 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_BPF_SYSCALL=y
CONFIG_BPF_JIT=y
CONFIG_PREEMPT_RT=y
CONFIG_SCHED_CORE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_RDMA=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CGROUP_HUGETLB=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_CGROUP_MISC=y
CONFIG_NAMESPACES=y
CONFIG_USER_NS=y
CONFIG_CHECKPOINT_RESTORE=y
CONFIG_SCHED_AUTOGROUP=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PERF_EVENTS=y
CONFIG_KEXEC=y
CONFIG_LOONGSON_2K300=y
CONFIG_HZ_1000=y
CONFIG_CMDLINE="fbcon=logo-pos:center fbcon=logo-count:1"
CONFIG_CMDLINE_EXTEND=y
CONFIG_BUILTIN_DTB=y
CONFIG_SMP=y
CONFIG_HIBERNATION=y
# CONFIG_ACPI_AC is not set
# CONFIG_ACPI_BATTERY is not set
# CONFIG_ACPI_BUTTON is not set
# CONFIG_ACPI_FAN is not set
# CONFIG_ACPI_PROCESSOR is not set
# CONFIG_ACPI_TABLE_UPGRADE is not set
# CONFIG_RANDOMIZE_KSTACK_OFFSET is not set
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_ZONED=y
CONFIG_BLK_DEV_THROTTLING=y
CONFIG_BLK_WBT=y
CONFIG_BLK_CGROUP_IOLATENCY=y
CONFIG_BLK_CGROUP_IOCOST=y
CONFIG_BLK_CGROUP_IOPRIO=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_ZSWAP=y
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y
CONFIG_ZBUD=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_PAGE_REPORTING=y
CONFIG_KSM=y
CONFIG_CMA=y
CONFIG_CMA_SYSFS=y
CONFIG_CMA_AREAS=20
CONFIG_USERFAULTFD=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_TLS=m
CONFIG_TLS_DEVICE=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_XDP_SOCKETS=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IPGRE=m
CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_ESPINTCP=y
CONFIG_INET_IPCOMP=m
CONFIG_INET_UDP_DIAG=y
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BBR=m
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_ESPINTCP=y
CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_MROUTE=y
CONFIG_MPTCP=y
CONFIG_NETWORK_PHY_TIMESTAMPING=y
CONFIG_NETFILTER=y
CONFIG_BRIDGE_NETFILTER=m
CONFIG_NETFILTER_NETLINK_LOG=m
CONFIG_NF_CONNTRACK=m
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_SNMP=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NF_CT_NETLINK=m
CONFIG_NF_TABLES=m
CONFIG_NF_TABLES_INET=y
CONFIG_NFT_CT=m
CONFIG_NFT_CONNLIMIT=m
CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m
CONFIG_NFT_MASQ=m
CONFIG_NFT_REDIR=m
CONFIG_NFT_NAT=m
CONFIG_NFT_TUNNEL=m
CONFIG_NFT_QUEUE=m
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m
CONFIG_NFT_HASH=m
CONFIG_NFT_FIB_INET=m
CONFIG_NFT_SOCKET=m
CONFIG_NFT_OSF=m
CONFIG_NFT_TPROXY=m
CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_AUDIT=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
CONFIG_NETFILTER_XT_TARGET_CT=m
CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_HMARK=m
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
CONFIG_NETFILTER_XT_TARGET_LED=m
CONFIG_NETFILTER_XT_TARGET_LOG=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_TRACE=m
CONFIG_NETFILTER_XT_TARGET_SECMARK=m
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
CONFIG_NETFILTER_XT_MATCH_BPF=m
CONFIG_NETFILTER_XT_MATCH_CGROUP=m
CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_CPU=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
CONFIG_NETFILTER_XT_MATCH_DSCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
CONFIG_NETFILTER_XT_MATCH_IPVS=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
CONFIG_NETFILTER_XT_MATCH_NFACCT=m
CONFIG_NETFILTER_XT_MATCH_OSF=m
CONFIG_NETFILTER_XT_MATCH_OWNER=m
CONFIG_NETFILTER_XT_MATCH_POLICY=m
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
CONFIG_NETFILTER_XT_MATCH_RATEEST=m
CONFIG_NETFILTER_XT_MATCH_REALM=m
CONFIG_NETFILTER_XT_MATCH_SOCKET=m
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
CONFIG_NETFILTER_XT_MATCH_TIME=m
CONFIG_NETFILTER_XT_MATCH_U32=m
CONFIG_IP_SET=m
CONFIG_IP_VS=m
CONFIG_IP_VS_IPV6=y
CONFIG_IP_VS_PROTO_TCP=y
CONFIG_IP_VS_PROTO_UDP=y
CONFIG_IP_VS_PROTO_ESP=y
CONFIG_IP_VS_PROTO_AH=y
CONFIG_IP_VS_PROTO_SCTP=y
CONFIG_IP_VS_RR=m
CONFIG_IP_VS_WRR=m
CONFIG_IP_VS_NFCT=y
CONFIG_NFT_DUP_IPV4=m
CONFIG_NFT_FIB_IPV4=m
CONFIG_NF_TABLES_ARP=y
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_RPFILTER=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_SYNPROXY=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_ECN=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_SECURITY=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
CONFIG_NFT_FIB_IPV6=m
CONFIG_IP6_NF_IPTABLES=y
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_MATCH_FRAG=m
CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
CONFIG_IP6_NF_MATCH_MH=m
CONFIG_IP6_NF_MATCH_RPFILTER=m
CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_MATCH_SRH=m
CONFIG_IP6_NF_FILTER=y
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_TARGET_SYNPROXY=m
CONFIG_IP6_NF_MANGLE=m
CONFIG_IP6_NF_RAW=m
CONFIG_IP6_NF_SECURITY=m
CONFIG_IP6_NF_NAT=m
CONFIG_IP6_NF_TARGET_MASQUERADE=m
CONFIG_IP6_NF_TARGET_NPT=m
CONFIG_NF_TABLES_BRIDGE=m
CONFIG_NF_CONNTRACK_BRIDGE=m
CONFIG_BRIDGE_NF_EBTABLES=m
CONFIG_BRIDGE_EBT_BROUTE=m
CONFIG_BRIDGE_EBT_T_FILTER=m
CONFIG_BRIDGE_EBT_T_NAT=m
CONFIG_BRIDGE_EBT_ARP=m
CONFIG_BRIDGE_EBT_IP=m
CONFIG_BRIDGE_EBT_IP6=m
CONFIG_IP_SCTP=m
CONFIG_RDS=y
CONFIG_L2TP=m
CONFIG_L2TP_V3=y
CONFIG_L2TP_IP=m
CONFIG_L2TP_ETH=m
CONFIG_BRIDGE=m
CONFIG_VLAN_8021Q=m
CONFIG_VLAN_8021Q_GVRP=y
CONFIG_VLAN_8021Q_MVRP=y
CONFIG_LLC2=m
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_SFQ=m
CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_CLS_BASIC=m
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
CONFIG_NET_CLS_CGROUP=m
CONFIG_NET_CLS_BPF=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=m
CONFIG_NET_ACT_GACT=m
CONFIG_NET_ACT_MIRRED=m
CONFIG_NET_ACT_NAT=m
CONFIG_NET_ACT_BPF=m
CONFIG_OPENVSWITCH=m
CONFIG_VSOCKETS=m
CONFIG_VIRTIO_VSOCKETS=m
CONFIG_NETLINK_DIAG=y
CONFIG_CGROUP_NET_PRIO=y
CONFIG_BPF_STREAM_PARSER=y
CONFIG_CAN=y
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_BNEP_MC_FILTER=y
CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y
CONFIG_BT_HCIBTUSB_MTK=y
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_ATH3K=y
CONFIG_BT_HCIUART_INTEL=y
CONFIG_BT_HCIUART_AG6XX=y
CONFIG_BT_HCIBCM203X=m
CONFIG_BT_HCIBPA10X=m
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIVHCI=m
CONFIG_BT_MRVL=m
CONFIG_BT_ATH3K=m
CONFIG_BT_VIRTIO=m
CONFIG_CFG80211=m
CONFIG_CFG80211_WEXT=y
CONFIG_MAC80211=m
CONFIG_RFKILL=m
CONFIG_RFKILL_INPUT=y
CONFIG_NET_9P=y
CONFIG_NET_9P_VIRTIO=y
# CONFIG_PCIEPORTBUS is not set
# CONFIG_PCIEASPM is not set
# CONFIG_VGA_ARB is not set
# CONFIG_HOTPLUG_PCI is not set
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_SW_SWITCHTEC=m
CONFIG_UEVENT_HELPER=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER_COMPRESS=y
CONFIG_FW_LOADER_COMPRESS_ZSTD=y
CONFIG_EFI_ZBOOT=y
CONFIG_EFI_BOOTLOADER_CONTROL=m
CONFIG_EFI_CAPSULE_LOADER=m
CONFIG_EFI_TEST=m
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
# CONFIG_EFI_DISABLE_RUNTIME is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BLOCK=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_VIRTIO_BLK=y
CONFIG_EEPROM_AT24=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SPI_ATTRS=m
CONFIG_SCSI_FC_ATTRS=m
CONFIG_SCSI_ISCSI_ATTRS=m
CONFIG_SCSI_SAS_LIBSAS=y
CONFIG_SCSI_SAS_ATA=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_MOBILE_LPM_POLICY=0
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_DWC=y
CONFIG_PATA_ATIIXP=y
CONFIG_NETDEVICES=y
CONFIG_BONDING=m
CONFIG_DUMMY=y
CONFIG_WIREGUARD=m
CONFIG_MACVLAN=m
CONFIG_MACVTAP=m
CONFIG_IPVLAN=m
CONFIG_VXLAN=y
CONFIG_TUN=m
CONFIG_VETH=m
CONFIG_VIRTIO_NET=m
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NET_VENDOR_ADAPTEC is not set
# CONFIG_NET_VENDOR_AGERE is not set
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_ALTEON is not set
# CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_ATHEROS is not set
CONFIG_BNX2=y
# CONFIG_NET_VENDOR_CAVIUM is not set
CONFIG_CHELSIO_T1=m
CONFIG_CHELSIO_T1_1G=y
CONFIG_CHELSIO_T3=m
CONFIG_CHELSIO_T4=m
# CONFIG_NET_VENDOR_CISCO is not set
# CONFIG_NET_VENDOR_DEC is not set
# CONFIG_NET_VENDOR_DLINK is not set
# CONFIG_NET_VENDOR_EMULEX is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_I825XX is not set
CONFIG_E1000=y
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_META is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
# CONFIG_NET_VENDOR_BROCADE is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RDC is not set
CONFIG_8139CP=m
CONFIG_8139TOO=m
CONFIG_R8169=y
# CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SILAN is not set
# CONFIG_NET_VENDOR_SIS is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set
CONFIG_STMMAC_ETH=y
# CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_TEHUTI is not set
# CONFIG_NET_VENDOR_TI is not set
# CONFIG_NET_VENDOR_VIA is not set
CONFIG_NGBE=y
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_NET_VENDOR_XILINX is not set
CONFIG_MOTORCOMM_PHY=y
CONFIG_CAN_LSCANFD=y
CONFIG_CAN_LSCANFD_PLATFORM=y
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPPOE=m
CONFIG_PPTP=m
CONFIG_PPPOL2TP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m
CONFIG_ATH9K=m
CONFIG_ATH9K_HTC=m
CONFIG_IWLWIFI=m
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_MT7601U=m
CONFIG_RT2X00=m
CONFIG_RT2800USB=m
CONFIG_RTL8192CE=m
CONFIG_RTL8192SE=m
CONFIG_RTL8192DE=m
CONFIG_RTL8723AE=m
CONFIG_RTL8723BE=m
CONFIG_RTL8188EE=m
CONFIG_RTL8192EE=m
CONFIG_RTL8821AE=m
CONFIG_RTL8192CU=m
# CONFIG_RTLWIFI_DEBUG is not set
CONFIG_RTL8XXXU=m
CONFIG_RTW88=m
CONFIG_RTW88_8822BE=m
CONFIG_RTW88_8822CE=m
CONFIG_RTW88_8723DE=m
CONFIG_RTW88_8821CE=m
CONFIG_RTW89=m
CONFIG_RTW89_8852AE=m
CONFIG_RTW89_8852CE=m
CONFIG_ZD1211RW=m
CONFIG_USB4_NET=m
CONFIG_INPUT_SPARSEKMAP=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_XTKBD=m
# CONFIG_MOUSE_PS2 is not set
CONFIG_MOUSE_SERIAL=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_GOODIX=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=m
CONFIG_SERIO_SERPORT=m
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=m
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=16
CONFIG_SERIAL_8250_RUNTIME_UARTS=16
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_IPMI_HANDLER=m
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=m
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=m
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PIIX4=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_LSFS=y
CONFIG_SPI=y
CONFIG_SPI_LOONGSON_PCI=m
CONFIG_SPI_LOONGSON_PLATFORM=m
CONFIG_SPI_LS=y
CONFIG_SPI_LS_IO=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_LOONGSON_IRQCHIP=y
CONFIG_GPIO_LOONGSON_64BIT=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_SYSCON_REBOOT_MODE=y
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_LM93=m
CONFIG_SENSORS_W83795=m
CONFIG_SENSORS_W83627HF=m
CONFIG_THERMAL=y
CONFIG_LOONGSON2_THERMAL=y
CONFIG_RC_CORE=m
CONFIG_LIRC=y
CONFIG_RC_DECODERS=y
CONFIG_IR_IMON_DECODER=m
CONFIG_IR_JVC_DECODER=m
CONFIG_IR_MCE_KBD_DECODER=m
CONFIG_IR_NEC_DECODER=m
CONFIG_IR_RC5_DECODER=m
CONFIG_IR_RC6_DECODER=m
CONFIG_IR_SANYO_DECODER=m
CONFIG_IR_SHARP_DECODER=m
CONFIG_IR_SONY_DECODER=m
CONFIG_IR_XMP_DECODER=m
CONFIG_MEDIA_SUPPORT=y
# CONFIG_DVB_CORE is not set
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
# CONFIG_RADIO_ADAPTERS is not set
# CONFIG_VIDEO_IR_I2C is not set
# CONFIG_MEDIA_TUNER_E4000 is not set
# CONFIG_MEDIA_TUNER_FC0011 is not set
# CONFIG_MEDIA_TUNER_FC0012 is not set
# CONFIG_MEDIA_TUNER_FC0013 is not set
# CONFIG_MEDIA_TUNER_FC2580 is not set
# CONFIG_MEDIA_TUNER_IT913X is not set
# CONFIG_MEDIA_TUNER_M88RS6000T is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MSI001 is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2063 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MXL301RF is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_R820T is not set
# CONFIG_MEDIA_TUNER_SI2157 is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_TDA18250 is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_TUA9001 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC4000 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
CONFIG_DRM=y
CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_SIMPLE_BRIDGE=y
CONFIG_DRM_LOONGSON=y
CONFIG_DRM_SIMPLEDRM=y
CONFIG_FB=y
CONFIG_FB_EFI=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_PLATFORM=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_GPIO=y
CONFIG_BACKLIGHT_LED=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=m
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_BT87X=m
CONFIG_SND_BT87X_OVERCLOCK=y
CONFIG_SND_HDA_INTEL=y
CONFIG_SND_HDA_HWDEP=y
CONFIG_SND_HDA_INPUT_BEEP=y
CONFIG_SND_HDA_PATCH_LOADER=y
CONFIG_SND_HDA_CODEC_REALTEK=y
CONFIG_SND_HDA_CODEC_SIGMATEL=y
CONFIG_SND_HDA_CODEC_HDMI=y
CONFIG_SND_HDA_CODEC_CONEXANT=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=y
CONFIG_SND_SOC_LOONGSON=y
CONFIG_SND_LS=y
CONFIG_SND_LS_PCM=y
CONFIG_SND_LS_PCM_GENERIC_DMA=y
CONFIG_SND_SOC_ES8328_I2C=y
CONFIG_SND_VIRTIO=m
CONFIG_HIDRAW=y
CONFIG_UHID=m
CONFIG_HID_A4TECH=m
CONFIG_HID_CHERRY=m
CONFIG_HID_LOGITECH=m
CONFIG_HID_LOGITECH_DJ=m
CONFIG_LOGITECH_FF=y
CONFIG_LOGIRUMBLEPAD2_FF=y
CONFIG_LOGIG940_FF=y
CONFIG_HID_MICROSOFT=m
CONFIG_HID_MULTITOUCH=m
CONFIG_HID_SUNPLUS=m
CONFIG_USB_HIDDEV=y
CONFIG_USB=y
CONFIG_USB_OTG=y
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_UHCI_HCD=y
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
CONFIG_USB_UAS=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_HOST=y
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_CH341=m
CONFIG_USB_SERIAL_CP210X=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_PL2303=m
CONFIG_USB_SERIAL_OPTION=m
CONFIG_USB_GADGET=y
CONFIG_TYPEC=m
CONFIG_TYPEC_TCPM=m
CONFIG_TYPEC_TCPCI=m
CONFIG_TYPEC_UCSI=m
CONFIG_UCSI_ACPI=m
CONFIG_MMC=y
CONFIG_MMC_LS2K=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_EFI=y
CONFIG_RTC_DRV_LOONGSON=y
CONFIG_DMADEVICES=y
CONFIG_LOONGSON2_APB_DMA=y
CONFIG_LSIA_DMA=y
CONFIG_UDMABUF=y
CONFIG_DMABUF_HEAPS=y
CONFIG_DMABUF_HEAPS_SYSTEM=y
CONFIG_DMABUF_HEAPS_CMA=y
CONFIG_UIO=y
CONFIG_UIO_PDRV_GENIRQ=y
CONFIG_UIO_DMEM_GENIRQ=y
CONFIG_UIO_PCI_GENERIC=y
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VHOST_MENU is not set
# CONFIG_LOONGARCH_PLATFORM_DEVICES is not set
CONFIG_COMMON_CLK_LOONGSON2=y
CONFIG_LOONGSON2_GUTS=y
CONFIG_LOONGSON2_PM=y
CONFIG_IIO=y
CONFIG_LS_2K300_ADC=y
CONFIG_PWM=y
CONFIG_PWM_LOONGSON=y
CONFIG_GENERIC_PHY=y
CONFIG_RAS=y
CONFIG_USB4=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_XFS_FS=y
CONFIG_XFS_QUOTA=y
CONFIG_XFS_POSIX_ACL=y
CONFIG_XFS_RT=y
CONFIG_XFS_ONLINE_SCRUB=y
CONFIG_XFS_ONLINE_REPAIR=y
CONFIG_XFS_DEBUG=y
CONFIG_XFS_DEBUG_EXPENSIVE=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_QUOTA=y
CONFIG_AUTOFS_FS=y
CONFIG_OVERLAY_FS=y
CONFIG_OVERLAY_FS_INDEX=y
CONFIG_OVERLAY_FS_XINO_AUTO=y
CONFIG_OVERLAY_FS_METACOPY=y
CONFIG_FSCACHE=y
CONFIG_CACHEFILES=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=936
CONFIG_FAT_DEFAULT_IOCHARSET="gb2312"
CONFIG_EXFAT_FS=y
CONFIG_NTFS3_FS=y
CONFIG_NTFS3_64BIT_CLUSTER=y
CONFIG_NTFS3_LZX_XPRESS=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_HUGETLBFS=y
CONFIG_CONFIGFS_FS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_ROOT_NFS=y
# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set
CONFIG_NFSD=y
CONFIG_NFSD_V3_ACL=y
CONFIG_NFSD_V4=y
CONFIG_NFSD_BLOCKLAYOUT=y
CONFIG_CEPH_FS=m
CONFIG_CEPH_FSCACHE=y
CONFIG_CEPH_FS_POSIX_ACL=y
CONFIG_CEPH_FS_SECURITY_LABEL=y
CONFIG_CIFS=m
# CONFIG_CIFS_DEBUG is not set
CONFIG_9P_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_UTF8=y
CONFIG_KEY_DH_OPERATIONS=y
CONFIG_SECURITY=y
CONFIG_SECURITY_SELINUX=y
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_YAMA=y
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_CRYPTO_USER=m
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
CONFIG_CRYPTO_CRYPTD=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_ESSIV=m
CONFIG_CRYPTO_BLAKE2B=y
CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_XXHASH=y
CONFIG_CRYPTO_CRC32=m
CONFIG_CRYPTO_842=m
CONFIG_CRYPTO_LZ4=m
CONFIG_CRYPTO_LZ4HC=m
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_XZ_DEC_MICROLZMA=y
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=0
CONFIG_IRQ_POLL=y
CONFIG_PRINTK_TIME=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
# CONFIG_FTRACE is not set
CONFIG_UNWINDER_ORC=y
arch/loongarch/kernel/setup.c
+278 -1
View File
@@ -49,6 +49,12 @@
#include <asm/time.h>
#include <asm/unwind.h>
#include <boot_param.h>
#ifndef CONFIG_BUILTIN_DTB_NAME
#define CONFIG_BUILTIN_DTB_NAME ""
#endif
#define SMBIOS_BIOSSIZE_OFFSET 0x09
#define SMBIOS_BIOSEXTERN_OFFSET 0x13
#define SMBIOS_FREQLOW_OFFSET 0x16
@@ -73,6 +79,8 @@ static const char dmi_empty_string[] = " ";
* These are initialized so they are in the .data section
*/
char init_command_line[COMMAND_LINE_SIZE] __initdata;
char board_name_desc[] = "board_name="; // 这是 command line 里面的内容 一定要有=
char bp_start_desc[] = "bp_start="; // 这是 command line 里面的内容 一定要有=
static int num_standard_resources;
static struct resource *standard_resources;
@@ -81,6 +89,17 @@ static struct resource code_resource = { .name = "Kernel code", };
static struct resource data_resource = { .name = "Kernel data", };
static struct resource bss_resource = { .name = "Kernel bss", };
//////////////////////////////////////
/////for bootloader mem map parse/////
//////////////////////////////////////
static unsigned long long bp_start;
struct loongsonlist_mem_map *loongson_mem_map;
static u8 __init ext_listhdr_checksum(u8 *buffer, u32 length);
static int __init parse_mem(struct _extention_list_hdr *head);
static void __init memmap_bootlaoder_parse(void);
static int __init parse_extlist(struct boot_params *bp);
static int __init bp_start_match(void);
const char *get_system_type(void)
{
return "generic-loongson-machine";
@@ -273,6 +292,106 @@ static void __init arch_reserve_crashkernel(void)
reserve_crashkernel_generic(cmdline, crash_size, crash_base, low_size, high);
}
#ifdef CONFIG_DTB_MATCH_BY_BOARD_NAME
static void* __init get_fdt_by_board_name(void)
{
void *fdt = NULL;
char* board_name;
char temp[128]; // 不想申请空间 应该不会有这么长的名字吧
board_name = strstr(boot_command_line, board_name_desc);
if (board_name) {
int i;
memset(temp, 0, 128);
board_name += strlen(board_name_desc); // 跳过 = 和前面的字段
for (i = 0; i < 127; ++i) {
if (board_name[i] == 0 || board_name[i] == ' ')
break;
temp[i] = board_name[i];
}
board_name = temp;
}
if (board_name) {
#ifdef CONFIG_LOONGSON_2K500
int i;
if (!strncmp(board_name, "LS2K500-HL-MB", 13))
fdt = &__dtb_ls2k500_hl_mb_begin;
else if (!strncmp(board_name, "LS2K500-MINI-DP", 15))
fdt = &__dtb_ls2k500_mini_dp_begin;
else if (!strncmp(board_name, "LS2K500-DAYU400-MB", 17))
fdt = &__dtb_ls2k500_dayu400_mb_begin;
else if (!strncmp(board_name, "LS2K500-MODI-HCT", 16))
fdt = &__dtb_ls2k500_modi_hct_begin;
else if (!strncmp(board_name, "LS2K500-ZHENGTAI-PCS1800-V10", 28))
fdt = &__dtb_ls2k500_zhengtai_pcs1800_v10_begin;
else if (!strncmp(board_name, "LS2K500-JIAOQIAN-V10", 20))
fdt = &__dtb_ls2k500_jiaoqian_v10_begin;
else if (!strncmp(board_name, "LS2K500-ZJJZ", 12))
fdt = &__dtb_ls2k500_zjjz_begin;
else
fdt = &__dtb_ls2k500_mini_dp_begin;
// for (i = 0; i < NR_CPUS; ++i)
// if (check_cpu_full_name_invaild(i))
// __cpu_full_name[i] = cpu_ls2k500_name;
#elif defined(CONFIG_LOONGSON_2K1000)
if (!strncmp(board_name, "LS2K1000-JL-MB", 14)) {
if (!strncmp(board_name, "LS2K1000-JL-MB-MU", 17))
fdt = &__dtb_ls2k1000_jl_mb_mu_begin;
else if (!strncmp(board_name, "LS2K1000-JL-MB-NODVO", 20))
fdt = &__dtb_ls2k1000_jl_mb_nodvo_begin;
else
fdt = &__dtb_ls2k1000_jl_mb_begin;
} else if (!strncmp(board_name, "LS2K1000-DP", 11)) {
#ifdef CONFIG_SND_LS1X_SOC_I2S
fdt = &__dtb_ls2k1000_dp_i2s_begin;
#else
if (!strncmp(board_name, "LS2K1000-DP-TEST", 16)) {
fdt = &__dtb_ls2k1000_dp_test_begin;
} else if (!strncmp(board_name, "LS2K1000-DP-FACTORY", 19)){
fdt = &__dtb_ls2k1000_dp_factory_begin;
} else {
fdt = &__dtb_ls2k1000_dp_begin;
}
#endif
} else if (!strncmp(board_name, "HAC_MB_REVC", 11)) {
fdt = &__dtb_ksec_hac_mb_begin;
} else if (!strncmp(board_name, "GBKPDM0-V10", 11)) {
fdt = &__dtb_gbkpdm0_v10_begin;
} else if (!strncmp(board_name, "GBKPDM0-LITONG", 14)) {
fdt = &__dtb_gbkpdm0_litong_begin;
} else if (!strncmp(board_name, "LS2K1000-ChuangLong-MB", 22)) {
fdt = &__dtb_ls2k1000_cl_mb_begin;
} else if (!strncmp(board_name, "C4G-MB001", 9)) {
fdt = &__dtb_ls2k1000_c4g_mb001_begin;
} else if (!strncmp(board_name, "ZNWLIDZD-LITONG", 15)) {
fdt = &__dtb_ls2k1000_znwlidzd_litong_begin;
} else {
fdt = &__dtb_ls2k1000_dp_begin;
}
#elif defined(CONFIG_LOONGSON_2P500)
if (!strncmp(board_name, "LS2P500-EVB", 11))
fdt = &__dtb_ls2p500_evb_begin;
else if (!strncmp(board_name, "LS2P500-RSJ", 11))
fdt = &__dtb_ls2p500_rsj_mb_v10_begin;
else if (!strncmp(board_name, "LS2P500-GBKPJM0", 15))
fdt = &__dtb_ls2p500_gbkpjm0_v10_begin;
else
fdt = &__dtb_ls2p500_evb_begin;
#elif defined(CONFIG_LOONGSON_2K300)
if (!strncmp(board_name, "LS2K300-MINI-DP", 15))
fdt = &__dtb_ls2k300_mini_dp_begin;
else if (!strncmp(board_name, "LS2K300-PAI", 11))
fdt = &__dtb_ls2k300_vanguard_pi_begin;
else if (!strncmp(board_name, "LS2K300-TEWEI", 13))
fdt = &__dtb_ls2k300_tewei_begin;
else
fdt = &__dtb_ls2k300_mini_dp_begin;
#endif
}
return fdt;
}
#endif
static void __init fdt_setup(void)
{
#ifdef CONFIG_OF_EARLY_FLATTREE
@@ -282,11 +401,19 @@ static void __init fdt_setup(void)
if (acpi_os_get_root_pointer())
return;
fdt_pointer = NULL;
#ifdef CONFIG_DTB_MATCH_BY_BOARD_NAME
fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */
if (!fdt_pointer)
fdt_pointer = get_fdt_by_board_name();
#else
/* Prefer to use built-in dtb, checking its legality first. */
if (IS_ENABLED(CONFIG_BUILTIN_DTB) && !fdt_check_header(__dtb_start))
if (!fdt_check_header(__dtb_start) && strcmp(CONFIG_BUILTIN_DTB_NAME, ""))
fdt_pointer = __dtb_start;
else
fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */
#endif
if (!fdt_pointer || fdt_check_header(fdt_pointer))
return;
@@ -586,6 +713,31 @@ static void __init prefill_possible_map(void)
}
#endif
#ifdef CONFIG_BLK_DEV_INITRD
static int __init rd_start_early(char *p)
{
phys_initrd_start = __pa(memparse(p, &p));
return 0;
}
early_param("rd_start", rd_start_early);
static int __init rd_size_early(char *p)
{
phys_initrd_size = memparse(p, &p);
return 0;
}
early_param("rd_size", rd_size_early);
#endif
static int __init bp_start_early(char *p)
{
bp_start = __pa(memparse(p, &p)); // 这里拿到的是物理地址
bp_start = TO_CACHE(bp_start); // 再转换成当前可以访问的地址
return 0;
}
early_param("bp_start", bp_start_early);
void __init setup_arch(char **cmdline_p)
{
cpu_probe();
@@ -593,6 +745,9 @@ void __init setup_arch(char **cmdline_p)
init_environ();
efi_init();
if (!bp_start_match() && bp_start)
parse_extlist((struct boot_params*)bp_start);
fdt_setup();
memblock_init();
pagetable_init();
@@ -617,3 +772,125 @@ void __init setup_arch(char **cmdline_p)
kasan_init();
#endif
}
//////////////////////////////////////
/////for bootloader mem map parse/////
//////////////////////////////////////
static __init u8 ext_listhdr_checksum(u8 *buffer, u32 length)
{
u8 sum = 0;
u8 *end = buffer + length;
while (buffer < end) {
sum = (u8)(sum + *(buffer++));
}
return (sum);
}
static __init int parse_mem(struct _extention_list_hdr *head)
{
struct loongsonlist_mem_map_legacy *ptr;
static struct loongsonlist_mem_map mem_map;
int i;
loongson_mem_map = (struct loongsonlist_mem_map *)head;
if (ext_listhdr_checksum((u8 *)loongson_mem_map, head->length)) {
printk("mem checksum error\n");
return -EPERM;
}
ptr = (struct loongsonlist_mem_map_legacy *)head;
pr_info("convert legacy mem map to new mem map.\n");
memcpy(&mem_map, ptr, sizeof(mem_map.header));
mem_map.map_count = ptr->map_count;
for (i = 0; i < ptr->map_count; i++) {
mem_map.map[i].mem_type = ptr->map[i].mem_type;
mem_map.map[i].mem_start = ptr->map[i].mem_start;
mem_map.map[i].mem_size = ptr->map[i].mem_size;
pr_info("bootloader memmap block %d type : %d start : %.llx size : %.llx\n",
i, mem_map.map[i].mem_type, mem_map.map[i].mem_start, mem_map.map[i].mem_size);
}
loongson_mem_map = &mem_map;
return 0;
}
static __init void memmap_bootlaoder_parse(void)
{
int i;
u32 mem_type;
u64 mem_start, mem_end, mem_size;
/* Parse memory information */
for (i = 0; i < loongson_mem_map->map_count; i++) {
mem_type = loongson_mem_map->map[i].mem_type;
mem_start = loongson_mem_map->map[i].mem_start;
mem_size = loongson_mem_map->map[i].mem_size;
mem_end = mem_start + mem_size;
switch (mem_type) {
case ADDRESS_TYPE_SYSRAM:
memblock_add(mem_start, mem_size);
if (max_low_pfn < (mem_end >> PAGE_SHIFT))
max_low_pfn = mem_end >> PAGE_SHIFT;
break;
}
}
}
static __init int parse_extlist(struct boot_params *bp)
{
unsigned long next_offset;
struct _extention_list_hdr *fhead;
// 原本有几种转换版本，但是这边就这一个
fhead = (struct _extention_list_hdr *)bp->extlist_offset;
if (fhead == NULL) {
printk("the ext struct is empty!\n");
return -1;
}
do {
if (memcmp(&(fhead->signature), LOONGSON_MEM_SIGNATURE, 3) == 0) {
if (parse_mem(fhead) != 0) {
printk("parse mem failed\n");
return -EPERM;
}
memmap_bootlaoder_parse();
}
fhead = (struct _extention_list_hdr *)fhead->next_offset;
next_offset = (unsigned long)fhead;
} while (next_offset);
return 0;
}
static int __init bp_start_match(void)
{
char* bp_start_value;
char temp[128]; // 不想申请空间 应该不会有这么长的值吧
bp_start = 0;
bp_start_value = strstr(boot_command_line, bp_start_desc);
if (bp_start_value) {
int i;
memset(temp, 0, 128);
bp_start_value += strlen(bp_start_desc); // 跳过 = 和前面的字段
for (i = 0; i < 127; ++i) {
if (bp_start_value[i] == 0 || bp_start_value[i] == ' ')
break;
temp[i] = bp_start_value[i];
}
bp_start_value = temp;
} else
return 1;
return bp_start_early(bp_start_value);
}
//////////////////////////////////////
/////for bootloader mem map parse/////
//////////////////////////////////////
arch/loongarch/kernel/time.c
+23
View File
@@ -12,6 +12,8 @@
#include <linux/kernel.h>
#include <linux/sched_clock.h>
#include <linux/spinlock.h>
#include <linux/of_clk.h>
#include <linux/clk.h>
#include <asm/cpu-features.h>
#include <asm/loongarch.h>
@@ -210,6 +212,27 @@ int __init constant_clocksource_init(void)
void __init time_init(void)
{
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK_LOONGSON2X)
struct clk* cpu_clk;
struct clk* ref_clk;
of_clk_init(NULL);
if (!cpu_clock_freq) {
cpu_clk = clk_get(NULL, "cpu_clk");
if (IS_ERR(cpu_clk))
pr_info("cpu clk cant get from clock driver");
else
cpu_clock_freq = clk_get_rate(cpu_clk);
}
if (!const_clock_freq) {
ref_clk = clk_get(NULL, "ref_clk");
if (IS_ERR(ref_clk))
pr_info("reference clock cant get from clock driver");
else
const_clock_freq = clk_get_rate(ref_clk);
}
#endif
if (!cpu_has_cpucfg)
const_clock_freq = cpu_clock_freq;
else