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1.add 2k300_gongkong board support 2.update dht11 driver 3.support EC200A-CN 4G model 4.goodix:reset: reset timing fixing 5.other bugs fix
190 lines
5.0 KiB
C
190 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2022 Loongson Corporation
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*/
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/*
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* Authors:
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* Sui Jingfeng <suijingfeng@loongson.cn>
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*/
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#ifndef __LSDC_DRV_H__
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#define __LSDC_DRV_H__
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#include <drm/drm_print.h>
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#include <drm/drm_device.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_plane.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_encoder.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_atomic.h>
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#include "lsdc_pll.h"
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#define DRIVER_AUTHOR "Sui Jingfeng <suijingfeng@loongson.cn>"
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#define DRIVER_NAME "lsdc"
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#define DRIVER_DESC "drm driver for loongson's display controller"
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#define DRIVER_DATE "20200701"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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#define LSDC_NUM_CRTC 2
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enum loongson_dc_family {
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LSDC_CHIP_UNKNOWN = 0,
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LSDC_CHIP_2K1000 = 1, /* 2-Core Mips64r2 compatible SoC */
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LSDC_CHIP_7A1000 = 2, /* North bridge of LS3A3000/LS3A4000/LS3A5000 */
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// linux-4.19 存在 LSDC_CHIP_7A1000_PLUS
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// LSDC_CHIP_7A1000_PLUS = 3, /* bandwidth improved */
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LSDC_CHIP_2K0500 = 3, /* Single core, reduced version of LS2K1000 */
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LSDC_CHIP_7A2000 = 4, /* Enhancement version of LS7a1000 */
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LSDC_CHIP_2K0300 = 6,
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LSDC_CHIP_LAST,
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};
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struct lsdc_chip_desc {
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enum loongson_dc_family chip;
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u32 num_of_crtc;
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u32 max_pixel_clk;
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u32 max_width;
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u32 max_height;
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u32 num_of_hw_cursor;
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u32 hw_cursor_w;
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u32 hw_cursor_h;
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/* DMA alignment constraint (must be multiple of 256 bytes) */
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u32 stride_alignment;
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bool has_builtin_i2c;
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bool has_vram;
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bool broken_gamma;
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};
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/* There is only a 1:1 mapping of encoders and connectors for lsdc */
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struct lsdc_output {
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struct drm_encoder encoder;
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struct drm_connector connector;
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struct lsdc_i2c *li2c;
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};
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static inline struct lsdc_output *
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drm_connector_to_lsdc_output(struct drm_connector *connp)
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{
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return container_of(connp, struct lsdc_output, connector);
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}
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/*
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* struct lsdc_display_pipe - Abstraction of hardware display pipeline.
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* @crtc: CRTC control structure
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* @plane: Plane control structure
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* @encoder: Encoder control structure
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* @pixpll: Pll control structure
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* @connector: point to connector control structure this display pipe bind
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* @index: the index corresponding to the hardware display pipe
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* @available: is this display pipe is available on the motherboard, The
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* downstream mother board manufacturer may use only one of them.
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* For example, LEMOTE LX-6901 board just has only one VGA output.
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*
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* Display pipeline with planes, crtc, pll and output collapsed into one entity.
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*/
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struct lsdc_display_pipe {
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struct drm_crtc crtc;
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struct drm_plane primary;
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struct drm_plane cursor;
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struct lsdc_pll pixpll;
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struct lsdc_output *output;
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int index;
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bool available;
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};
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static inline struct lsdc_display_pipe *
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drm_crtc_to_dispipe(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct lsdc_display_pipe, crtc);
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}
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static inline struct lsdc_display_pipe *
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lsdc_cursor_to_dispipe(struct drm_plane *plane)
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{
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return container_of(plane, struct lsdc_display_pipe, cursor);
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}
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struct lsdc_crtc_state {
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struct drm_crtc_state base;
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struct lsdc_pll_core_values pparams;
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};
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struct lsdc_device {
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struct device *dev;
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struct drm_device *ddev;
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/* @dc: pointer to the platform device created at runtime */
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struct platform_device *dc;
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/* @desc: device dependent data and feature descriptions */
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const struct lsdc_chip_desc *desc;
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/* LS7A1000/LS7A2000 has a dediacted video RAM */
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void __iomem *reg_base;
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void __iomem *vram;
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resource_size_t vram_base;
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resource_size_t vram_size;
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struct lsdc_display_pipe dispipe[LSDC_NUM_CRTC];
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/*
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* @num_output: count the number of active display pipe.
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*/
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unsigned int num_output;
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int irq;
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u32 irq_status;
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/*
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* @use_vram_helper: using vram helper base solution instead of
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* CMA helper based solution. The DC scanout from the VRAM is
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* proved to be more reliable, but graphic application is may
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* become slow when using this driver mode.
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*/
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bool use_vram_helper;
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/*
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* @enable_gamma: control whether hardware gamma support should be
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* enabled or not. It is broken though, but you can know that only
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* when you can enable it.
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*/
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bool enable_gamma;
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/* @relax_alignment: for 800x480, 1366x768 resulotion support */
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bool relax_alignment;
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/* @has_dt: true if there are DT support*/
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bool has_dt;
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/* @has_ports_node: true if there are OF graph in the DT */
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bool has_ports_node;
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bool display_rgb565;
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};
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static inline struct lsdc_device *to_lsdc(struct drm_device *ddev)
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{
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return ddev->dev_private;
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}
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static inline struct lsdc_crtc_state *
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to_lsdc_crtc_state(struct drm_crtc_state *base)
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{
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return container_of(base, struct lsdc_crtc_state, base);
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}
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int lsdc_crtc_init(struct drm_device *ddev,
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struct drm_crtc *crtc,
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unsigned int index,
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struct drm_plane *primary,
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struct drm_plane *cursor);
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int lsdc_plane_init(struct lsdc_device *ldev, struct drm_plane *plane,
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enum drm_plane_type type, unsigned int index);
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int lsdc_common_probe(struct lsdc_device *ldev);
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int lsdc_common_remove(struct lsdc_device *pdev);
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void lsdc_enable_all_display(struct lsdc_device *ldev);
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#endif
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