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104 lines
1.8 KiB
ArmAsm
104 lines
1.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2021 Loongson Technology Corporation Limited
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*/
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#include <asm/alternative-asm.h>
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#include <asm/asm.h>
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#include <asm/asmmacro.h>
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#include <asm/cpu.h>
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#include <asm/export.h>
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#include <asm/regdef.h>
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.macro fixup_ex from, to, offset, fix
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.if \fix
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.section .fixup, "ax"
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\to: addi.d v0, a1, \offset
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jr ra
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.previous
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.endif
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.section __ex_table, "a"
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PTR \from\()b, \to\()b
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.previous
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.endm
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SYM_FUNC_START(__clear_user)
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/*
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* Some CPUs support hardware unaligned access
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*/
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ALTERNATIVE "b __clear_user_generic", \
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"b __clear_user_fast", CPU_FEATURE_UAL
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SYM_FUNC_END(__clear_user)
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EXPORT_SYMBOL(__clear_user)
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/*
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* unsigned long __clear_user_generic(void *addr, size_t size)
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*
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* a0: addr
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* a1: size
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*/
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SYM_FUNC_START(__clear_user_generic)
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beqz a1, 2f
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1: st.b zero, a0, 0
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addi.d a0, a0, 1
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addi.d a1, a1, -1
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bgt a1, zero, 1b
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2: move v0, a1
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jr ra
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fixup_ex 1, 3, 0, 1
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SYM_FUNC_END(__clear_user_generic)
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/*
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* unsigned long __clear_user_fast(void *addr, unsigned long size)
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*
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* a0: addr
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* a1: size
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*/
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SYM_FUNC_START(__clear_user_fast)
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beqz a1, 10f
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ori a2, zero, 64
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blt a1, a2, 9f
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/* set 64 bytes at a time */
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1: st.d zero, a0, 0
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2: st.d zero, a0, 8
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3: st.d zero, a0, 16
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4: st.d zero, a0, 24
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5: st.d zero, a0, 32
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6: st.d zero, a0, 40
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7: st.d zero, a0, 48
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8: st.d zero, a0, 56
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addi.d a0, a0, 64
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addi.d a1, a1, -64
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bge a1, a2, 1b
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beqz a1, 10f
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/* set the remaining bytes */
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9: st.b zero, a0, 0
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addi.d a0, a0, 1
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addi.d a1, a1, -1
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bgt a1, zero, 9b
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/* return */
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10: move v0, a1
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jr ra
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/* fixup and ex_table */
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fixup_ex 1, 11, 0, 1
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fixup_ex 2, 12, -8, 1
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fixup_ex 3, 13, -16, 1
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fixup_ex 4, 14, -24, 1
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fixup_ex 5, 15, -32, 1
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fixup_ex 6, 16, -40, 1
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fixup_ex 7, 17, -48, 1
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fixup_ex 8, 18, -56, 1
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fixup_ex 9, 11, 0, 0
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SYM_FUNC_END(__clear_user_fast)
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