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163 lines
3.9 KiB
ArmAsm
163 lines
3.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Author: Jinyang He <hejinyang@loongson.cn>
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* Author: Huacai Chen <chenhuacai@loongson.cn>
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* Copyright (C) 2020-2021 Loongson Technology Corporation Limited
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*/
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#include <asm/export.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/ftrace.h>
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#include <asm/unwind_hints.h>
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.text
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/*
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* Due to -fpatchable-function-entry=2: the compiler inserted 2 NOPs before the
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* regular C function prologue. When PC arrived here, the last 2 instructions
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* as follows,
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* move t0, ra
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* bl callsite (for modules, callsite is a tramplione)
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*
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* modules tramplione as follows,
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* addu16i.d t1, zero, callsite[31:16]
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* lu32i.d t1, callsite[51:32]
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* lu52i.d t1, t1, callsite[63:52]
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* jirl zero, t1, callsite[15:0] >> 2
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*
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* See arch/loongarch/kernel/ftrace_dyn.c for details. Here, pay attention to
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* that the T series regs are available and safe because each C functions
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* follows the LoongArch psABI well.
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*/
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.macro ftrace_regs_entry allregs=0
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PTR_ADDIU sp, sp, -PT_SIZE
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/* Save trace function ra at PT_ERA */
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PTR_S ra, sp, PT_ERA
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/* Save parent ra at PT_R1(RA) */
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PTR_S t0, sp, PT_R1
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PTR_S a0, sp, PT_R4
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PTR_S a1, sp, PT_R5
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PTR_S a2, sp, PT_R6
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PTR_S a3, sp, PT_R7
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PTR_S a4, sp, PT_R8
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PTR_S a5, sp, PT_R9
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PTR_S a6, sp, PT_R10
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PTR_S a7, sp, PT_R11
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PTR_S fp, sp, PT_R22
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.if \allregs
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PTR_S t0, sp, PT_R12
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PTR_S t1, sp, PT_R13
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PTR_S t2, sp, PT_R14
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PTR_S t3, sp, PT_R15
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PTR_S t4, sp, PT_R16
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PTR_S t5, sp, PT_R17
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PTR_S t6, sp, PT_R18
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PTR_S t7, sp, PT_R19
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PTR_S t8, sp, PT_R20
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PTR_S s0, sp, PT_R23
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PTR_S s1, sp, PT_R24
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PTR_S s2, sp, PT_R25
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PTR_S s3, sp, PT_R26
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PTR_S s4, sp, PT_R27
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PTR_S s5, sp, PT_R28
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PTR_S s6, sp, PT_R29
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PTR_S s7, sp, PT_R30
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PTR_S s8, sp, PT_R31
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PTR_S tp, sp, PT_R2
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PTR_S sp, sp, PT_R3
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/* Clear it for later use as a flag sometimes. */
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PTR_S zero, sp, PT_R0
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PTR_S $r21, sp, PT_R21
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.endif
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UNWIND_HINT_REGS
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.endm
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SYM_CODE_START(ftrace_caller)
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UNWIND_HINT
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ftrace_regs_entry allregs=0
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b ftrace_common
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SYM_CODE_END(ftrace_caller)
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#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
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SYM_CODE_START(ftrace_regs_caller)
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UNWIND_HINT
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ftrace_regs_entry allregs=1
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b ftrace_common
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SYM_CODE_END(ftrace_regs_caller)
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#endif
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SYM_CODE_START(ftrace_common)
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UNWIND_HINT_REGS
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PTR_ADDIU a0, ra, -8 /* arg0: ip */
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move a1, t0 /* arg1: parent_ip */
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la.pcrel t1, function_trace_op
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PTR_L a2, t1, 0 /* arg2: op */
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move a3, sp /* arg3: regs */
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.globl ftrace_call
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ftrace_call:
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bl ftrace_stub
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#ifdef CONFIG_FUNCTION_GRAPH_TRACER
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.globl ftrace_graph_call
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ftrace_graph_call:
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nop /* b ftrace_graph_caller */
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#endif
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/*
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* As we didn't use S series regs in this assmembly code and all calls
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* are C function which will save S series regs by themselves, there is
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* no need to restore S series regs. The T series is available and safe
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* at the callsite, so there is no need to restore the T series regs.
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*/
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ftrace_common_return:
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PTR_L a0, sp, PT_R4
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PTR_L a1, sp, PT_R5
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PTR_L a2, sp, PT_R6
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PTR_L a3, sp, PT_R7
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PTR_L a4, sp, PT_R8
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PTR_L a5, sp, PT_R9
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PTR_L a6, sp, PT_R10
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PTR_L a7, sp, PT_R11
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PTR_L fp, sp, PT_R22
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PTR_L ra, sp, PT_R1
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PTR_L t0, sp, PT_ERA
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PTR_ADDIU sp, sp, PT_SIZE
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UNWIND_HINT
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jirl zero, t0, 0
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SYM_CODE_END(ftrace_common)
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#ifdef CONFIG_FUNCTION_GRAPH_TRACER
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SYM_CODE_START(ftrace_graph_caller)
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UNWIND_HINT_REGS
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PTR_L a0, sp, PT_ERA
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PTR_ADDIU a0, a0, -8 /* arg0: self_addr */
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PTR_ADDIU a1, sp, PT_R1 /* arg1: parent */
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bl prepare_ftrace_return
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b ftrace_common_return
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SYM_CODE_END(ftrace_graph_caller)
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SYM_CODE_START(return_to_handler)
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UNWIND_HINT
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/* save return value regs */
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PTR_ADDIU sp, sp, -2 * SZREG
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PTR_S a0, sp, 0
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PTR_S a1, sp, SZREG
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move a0, zero /* Has no check FP now. */
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bl ftrace_return_to_handler
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move ra, a0 /* parent ra */
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/* restore return value regs */
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PTR_L a0, sp, 0
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PTR_L a1, sp, SZREG
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PTR_ADDIU sp, sp, 2 * SZREG
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jirl zero, ra, 0
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SYM_CODE_END(return_to_handler)
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#endif
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SYM_FUNC_START(ftrace_stub)
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jirl zero, ra, 0
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SYM_FUNC_END(ftrace_stub)
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