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https://gitee.com/open-loongarch/linux-5.10.git
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191 lines
3.6 KiB
C
191 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Some useful macros for LoongArch assembler code
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*
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* Copyright (C) 2020-2021 Loongson Technology Corporation Limited
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*
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* Derived from MIPS:
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* Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
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* Copyright (C) 1999 by Silicon Graphics, Inc.
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* Copyright (C) 2001 MIPS Technologies, Inc.
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* Copyright (C) 2002 Maciej W. Rozycki
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*/
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#ifndef __ASM_ASM_H
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#define __ASM_ASM_H
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/* LoongArch pref instruction. */
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#ifdef CONFIG_CPU_HAS_PREFETCH
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#define PREF(hint, addr, offs) \
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preld hint, addr, offs; \
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#define PREFX(hint, addr, index) \
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preldx hint, addr, index; \
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#else /* !CONFIG_CPU_HAS_PREFETCH */
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#define PREF(hint, addr, offs)
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#define PREFX(hint, addr, index)
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#endif /* !CONFIG_CPU_HAS_PREFETCH */
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/*
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* Stack alignment
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*/
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#define ALSZ 0xf
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#define ALMASK ~ALSZ
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/*
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* Macros to handle different pointer/register sizes for 32/64-bit code
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*/
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/*
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* Size of a register
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*/
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#ifndef __loongarch64
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#define SZREG 4
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#else
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#define SZREG 8
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#endif
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/*
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* Use the following macros in assemblercode to load/store registers,
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* pointers etc.
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*/
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#if (SZREG == 4)
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#define REG_L ld.w
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#define REG_S st.w
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#define REG_ADDU add.w
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#define REG_SUBU sub.w
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#else /* SZREG == 8 */
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#define REG_L ld.d
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#define REG_S st.d
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#define REG_ADDU add.d
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#define REG_SUBU sub.d
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#endif
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/*
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* How to add/sub/load/store/shift C int variables.
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*/
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#if (_LOONGARCH_SZINT == 32)
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#define INT_ADDU add.w
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#define INT_ADDIU addi.w
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#define INT_SUBU sub.w
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#define INT_L ld.w
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#define INT_S st.w
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#define INT_SLL slli.w
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#define INT_SLLV sll.w
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#define INT_SRL srli.w
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#define INT_SRLV srl.w
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#define INT_SRA srai.w
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#define INT_SRAV sra.w
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#endif
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#if (_LOONGARCH_SZINT == 64)
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#define INT_ADDU add.d
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#define INT_ADDIU addi.d
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#define INT_SUBU sub.d
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#define INT_L ld.d
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#define INT_S st.d
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#define INT_SLL slli.d
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#define INT_SLLV sll.d
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#define INT_SRL srli.d
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#define INT_SRLV srl.d
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#define INT_SRA sra.w
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#define INT_SRAV sra.d
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#endif
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/*
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* How to add/sub/load/store/shift C long variables.
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*/
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#if (_LOONGARCH_SZLONG == 32)
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#define LONG_ADDU add.w
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#define LONG_ADDIU addi.w
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#define LONG_SUBU sub.w
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#define LONG_L ld.w
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#define LONG_S st.w
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#define LONG_SP swp
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#define LONG_SLL slli.w
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#define LONG_SLLV sll.w
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#define LONG_SRL srli.w
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#define LONG_SRLV srl.w
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#define LONG_SRA srai.w
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#define LONG_SRAV sra.w
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#ifdef __ASSEMBLY__
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#define LONG .word
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#endif
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#define LONGSIZE 4
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#define LONGMASK 3
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#define LONGLOG 2
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#endif
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#if (_LOONGARCH_SZLONG == 64)
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#define LONG_ADDU add.d
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#define LONG_ADDIU addi.d
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#define LONG_SUBU sub.d
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#define LONG_L ld.d
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#define LONG_S st.d
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#define LONG_SP sdp
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#define LONG_SLL slli.d
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#define LONG_SLLV sll.d
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#define LONG_SRL srli.d
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#define LONG_SRLV srl.d
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#define LONG_SRA sra.w
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#define LONG_SRAV sra.d
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#ifdef __ASSEMBLY__
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#define LONG .dword
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#endif
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#define LONGSIZE 8
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#define LONGMASK 7
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#define LONGLOG 3
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#endif
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/*
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* How to add/sub/load/store/shift pointers.
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*/
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#if (_LOONGARCH_SZPTR == 32)
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#define PTR_ADDU add.w
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#define PTR_ADDIU addi.w
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#define PTR_SUBU sub.w
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#define PTR_L ld.w
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#define PTR_S st.w
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#define PTR_LI li.w
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#define PTR_SLL slli.w
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#define PTR_SLLV sll.w
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#define PTR_SRL srli.w
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#define PTR_SRLV srl.w
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#define PTR_SRA srai.w
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#define PTR_SRAV sra.w
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#define PTR_SCALESHIFT 2
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#define PTR .word
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#define PTRSIZE 4
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#define PTRLOG 2
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#endif
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#if (_LOONGARCH_SZPTR == 64)
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#define PTR_ADDU add.d
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#define PTR_ADDIU addi.d
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#define PTR_SUBU sub.d
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#define PTR_L ld.d
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#define PTR_S st.d
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#define PTR_LI li.d
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#define PTR_SLL slli.d
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#define PTR_SLLV sll.d
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#define PTR_SRL srli.d
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#define PTR_SRLV srl.d
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#define PTR_SRA srai.d
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#define PTR_SRAV sra.d
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#define PTR_SCALESHIFT 3
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#define PTR .dword
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#define PTRSIZE 8
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#define PTRLOG 3
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#endif
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#endif /* __ASM_ASM_H */
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